mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-06 06:03:23 +00:00
Code Activity

added while and repeat support to verilog parser

Browse source
This commit is contained in:
Clifford Wolf 2014-06-06 17:40:04 +02:00
parent f9c1cd5edb
commit b5cd7a0179
4 changed files with 31 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

1
frontends/ast/ast.cc
View file

@ -137,6 +137,7 @@ std::string AST::type2str(AstNodeType type)
X(AST_DEFAULT)
X(AST_FOR)
X(AST_WHILE)
X(AST_REPEAT)
X(AST_GENVAR)
X(AST_GENFOR)
X(AST_GENIF)

1
frontends/ast/ast.h
View file

@ -117,6 +117,7 @@ namespace AST
AST_DEFAULT,
AST_FOR,
AST_WHILE,
AST_REPEAT,
AST_GENVAR,
AST_GENFOR,