3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-23 00:55:32 +00:00

Fix SystemVerilog support for .v files

This commit is contained in:
Akash Levy 2024-05-09 04:54:00 -07:00
parent 9b66cb015b
commit b5af9b9a8a

View file

@ -3382,10 +3382,14 @@ struct VerificPass : public Pass {
if (GetSize(args) > argidx && (args[argidx] == "-auto_discover" || args[argidx] == "-hdl_sort"))
{
// Always operate in SystemVerilog mode (overriding not supported)
// Always operate in SystemVerilog mode
unsigned verilog_mode = veri_file::SYSTEM_VERILOG;
const char* arg = args[argidx].c_str();
// Treat .v as SystemVerilog too (overriding default behavior to treat it as VERILOG_2000)
hdl_file_sort::RemoveFileExt(".v");
hdl_file_sort::AddFileExtMode(".v", veri_file::SYSTEM_VERILOG);
// Select analyze function
auto analyze_function = (args[argidx] == "-auto_discover") ? hdl_file_sort::AnalyzeDiscoveredFiles : hdl_file_sort::AnalyzeSortedFiles;