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Removed TODO list from README file

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Clifford Wolf 2015-02-01 00:48:22 +01:00
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README
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@ -366,33 +366,3 @@ from SystemVerilog:
- The keywords "always_comb", "always_ff" and "always_latch", "logic" and
"bit" are supported.
Roadmap / Large-scale TODOs
===========================
- Technology mapping for real-world applications
- Improve Xilinx FGPA synthesis (RAMB, CARRY4, SLR, etc.)
- Implement SAT-based formal equivialence checker
- Write equiv pass based on hint-based register mapping
- Re-implement Verilog frontend (far future)
- cleaner (easier to use, harder to use wrong) AST format
- pipeline of well structured AST transformations
- true contextual name lookup
Other Unsorted TODOs
====================
- Implement missing Verilog 2005 features:
- Support for real (float) const. expressions and parameters
- Ignore what needs to be ignored (e.g. drive and charge strengths)
- Check standard vs. implementation to identify missing features
- Miscellaneous TODO items:
- Add brief source code documentation to most passes and kernel code
- Implement mux-to-tribuf pass and rebalance mixed mux/tribuf trees