diff --git a/Makefile b/Makefile
index 6ee34070d..ab399ef2e 100644
--- a/Makefile
+++ b/Makefile
@@ -718,6 +718,8 @@ ifneq ($(SMALL),1)
 
 OBJS += libs/subcircuit/subcircuit.o
 
+include $(YOSYS_SRC)/kernel/unstable/Makefile.inc
+
 include $(YOSYS_SRC)/frontends/*/Makefile.inc
 include $(YOSYS_SRC)/passes/*/Makefile.inc
 include $(YOSYS_SRC)/backends/*/Makefile.inc
diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 146a552e6..cf43df7f0 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -106,6 +106,7 @@ namespace RTLIL
 	struct Monitor;
 	struct Design;
 	struct Module;
+	struct Patch;
 	struct Wire;
 	struct Memory;
 	struct Cell;
@@ -2527,13 +2528,13 @@ struct RTLIL::Cell : public RTLIL::NamedObject
 	Hasher::hash_t hashidx_;
 	[[nodiscard]] Hasher hash_into(Hasher h) const { h.eat(hashidx_); return h; }
 
-protected:
+public:
 	// use module->addCell() and module->remove() to create or destroy cells
 	friend struct RTLIL::Module;
+	friend struct RTLIL::Patch;
 	Cell();
 	~Cell();
 
-public:
 	// do not simply copy cells
 	Cell(RTLIL::Cell &other) = delete;
 	void operator=(RTLIL::Cell &other) = delete;
diff --git a/kernel/unstable/Makefile.inc b/kernel/unstable/Makefile.inc
new file mode 100644
index 000000000..35735eef2
--- /dev/null
+++ b/kernel/unstable/Makefile.inc
@@ -0,0 +1,2 @@
+OBJS += kernel/unstable/patch.o
+$(eval $(call add_include_file,kernel/unstable/patch.h))
diff --git a/kernel/unstable/patch.cc b/kernel/unstable/patch.cc
new file mode 100644
index 000000000..18d761384
--- /dev/null
+++ b/kernel/unstable/patch.cc
@@ -0,0 +1,21 @@
+#include "kernel/unstable/patch.h"
+
+YOSYS_NAMESPACE_BEGIN
+
+using namespace RTLIL;
+Cell* Patch::addCell(IdString name, IdString type) {
+    auto& cell = cells_.emplace_back();
+	cell.name = std::move(name);
+	cell.type = type;
+    return &cell;
+}
+// RTLIL::Cell *RTLIL::Module::addCell(RTLIL::IdString name, RTLIL::IdString type)
+// {
+// 	RTLIL::Cell *cell = new RTLIL::Cell;
+// 	cell->name = std::move(name);
+// 	cell->type = type;
+// 	add(cell);
+// 	return cell;
+// }
+
+YOSYS_NAMESPACE_END
\ No newline at end of file
diff --git a/kernel/unstable/patch.h b/kernel/unstable/patch.h
new file mode 100644
index 000000000..ede8b57cb
--- /dev/null
+++ b/kernel/unstable/patch.h
@@ -0,0 +1,39 @@
+#ifndef PATCH_H
+#define PATCH_H
+
+#include "kernel/rtlil.h"
+
+YOSYS_NAMESPACE_BEGIN
+
+struct RTLIL::Patch
+{
+	Hasher::hash_t hashidx_;
+	[[nodiscard]] Hasher hash_into(Hasher h) const { h.eat(hashidx_); return h; }
+
+protected:
+	void add(RTLIL::Wire *wire);
+	void add(RTLIL::Cell *cell);
+	void add(RTLIL::Process *process);
+
+public:
+	// RTLIL::Design *design;
+	vector<Wire> wires_;
+	vector<Cell> cells_;
+
+	vector<RTLIL::SigSig>   connections_;
+
+	void connect(const RTLIL::SigSig &conn);
+	void connect(const RTLIL::SigSpec &lhs, const RTLIL::SigSpec &rhs);
+	const std::vector<RTLIL::SigSig> &connections() const;
+
+	void patch(RTLIL::Module *mod);
+	RTLIL::Wire *addWire(RTLIL::IdString name, int width = 1);
+	RTLIL::Wire *addWire(RTLIL::IdString name, const RTLIL::Wire *other);
+
+	RTLIL::Cell *addCell(RTLIL::IdString name, RTLIL::IdString type);
+	RTLIL::Cell *addCell(RTLIL::IdString name, const RTLIL::Cell *other);
+};
+
+YOSYS_NAMESPACE_END
+
+#endif