mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-13 04:28:18 +00:00
Code Activity

abc9_ops: fix bypass boxes using (* abc9_bypass *)

Browse source
This commit is contained in:
Eddie Hung 2020-04-21 14:12:28 -07:00
parent d5a8aaba8c
commit b3e2538a14
2 changed files with 10 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
kernel/constids.inc
View file

@ -2,10 +2,9 @@ X(A)
X(abc9_box) X(abc9_box)
X(abc9_box_id) X(abc9_box_id)
X(abc9_box_seq) X(abc9_box_seq)
X(abc9_bypass)
X(abc9_carry) X(abc9_carry)
X(abc9_flop) X(abc9_flop)
X(abc9_holes)
X(abc9_init)
X(abc9_lut) X(abc9_lut)
X(abc9_mergeability) X(abc9_mergeability)
X(abc9_scc) X(abc9_scc)

21
passes/techmap/abc9_ops.cc
View file

@ -102,7 +102,7 @@ void check(RTLIL::Design *design, bool dff_mode)
auto inst_module = design->module(cell->type); auto inst_module = design->module(cell->type);
if (!inst_module) if (!inst_module)
continue; continue;
if (!inst_module->attributes.count(ID::abc9_flop)) if (!inst_module->get_bool_attribute(ID::abc9_flop))
continue; continue;
auto derived_type = inst_module->derive(design, cell->parameters); auto derived_type = inst_module->derive(design, cell->parameters);
if (!processed.insert(derived_type).second) if (!processed.insert(derived_type).second)
@ -171,9 +171,9 @@ void prep_hier(RTLIL::Design *design, bool dff_mode)
if (derived_module->get_blackbox_attribute(true /* ignore_wb */)) if (derived_module->get_blackbox_attribute(true /* ignore_wb */))
continue; continue;
if (inst_module->attributes.count(ID::abc9_flop) && !dff_mode) if (inst_module->get_bool_attribute(ID::abc9_flop) && !dff_mode)
continue; continue;
if (!inst_module->attributes.count(ID::abc9_box) && !inst_module->attributes.count(ID::abc9_flop)) if (!inst_module->get_bool_attribute(ID::abc9_box) && !inst_module->get_bool_attribute(ID::abc9_flop))
continue; continue;
if (!unmap_design->module(derived_type)) { if (!unmap_design->module(derived_type)) {
@ -205,13 +205,11 @@ void prep_hier(RTLIL::Design *design, bool dff_mode)
break; break;
} }
if (!found) { if (!found)
derived_module->set_bool_attribute(ID::abc9_box, false);
log_assert(!derived_module->attributes.count(ID::abc9_box));
goto skip_cell; goto skip_cell;
}
derived_module->set_bool_attribute(ID::abc9_box, false); derived_module->set_bool_attribute(ID::abc9_box, false);
derived_module->set_bool_attribute(ID::abc9_bypass);
} }
if (derived_type != cell->type) { if (derived_type != cell->type) {
@ -265,9 +263,8 @@ void prep_bypass(RTLIL::Design *design)
auto derived_type = inst_module->derive(design, cell->parameters); auto derived_type = inst_module->derive(design, cell->parameters);
inst_module = design->module(derived_type); inst_module = design->module(derived_type);
log_assert(inst_module); log_assert(inst_module);
if (inst_module->get_blackbox_attribute(true /* ignore_wb */)) log_assert(!inst_module->get_blackbox_attribute(true /* ignore_wb */));
continue; if (!inst_module->get_bool_attribute(ID::abc9_bypass))
if (!inst_module->get_bool_attribute(ID::abc9_box))
continue; continue;
@ -444,7 +441,7 @@ void prep_dff(RTLIL::Design *design)
auto inst_module = design->module(cell->type); auto inst_module = design->module(cell->type);
if (!inst_module) if (!inst_module)
continue; continue;
if (!inst_module->attributes.count(ID::abc9_flop)) if (!inst_module->get_bool_attribute(ID::abc9_flop))
continue; continue;
auto derived_type = inst_module->derive(design, cell->parameters); auto derived_type = inst_module->derive(design, cell->parameters);
auto derived_module = design->module(derived_type); auto derived_module = design->module(derived_type);
@ -589,7 +586,7 @@ void prep_xaiger(RTLIL::Module *module, bool dff)
continue; continue;
auto inst_module = design->module(cell->type); auto inst_module = design->module(cell->type);
bool abc9_flop = inst_module && inst_module->attributes.count(ID::abc9_flop); bool abc9_flop = inst_module && inst_module->get_bool_attribute(ID::abc9_flop);
if (abc9_flop && !dff) if (abc9_flop && !dff)
continue; continue;