3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-24 01:25:33 +00:00

Merging attribute rules into a single match block; Adding tests

This commit is contained in:
Diego H 2019-12-15 23:33:09 -06:00
parent 266993408a
commit b35559fc33
5 changed files with 3465 additions and 86 deletions

View file

@ -77,51 +77,45 @@ endbram
# https://www.xilinx.com/support/documentation/user_guides/ug473_7Series_Memory_Resources.pdf
match $__XILINX_RAMB36_SDP
attribute ram_style=block ram_block=1
attribute !ram_style=distributed
attribute !logic_block
min bits 1024
min efficiency 5
shuffle_enable B
make_transp
attribute !ram_style !logic_block
or_next_if_better
endmatch
match $__XILINX_RAMB18_SDP
attribute ram_style=block ram_block=1
attribute !ram_style=distributed
attribute !logic_block
min bits 1024
min efficiency 5
shuffle_enable B
make_transp
attribute !ram_style !logic_block
or_next_if_better
endmatch
match $__XILINX_RAMB18_SDP
shuffle_enable B
make_transp
attribute ram_block=1 ram_style=block
or_next_if_better
endmatch
match $__XILINX_RAMB36_TDP
attribute ram_style=block ram_block=1
attribute !ram_style=distributed
attribute !logic_block
min bits 1024
min efficiency 5
shuffle_enable B
make_transp
attribute !ram_style !logic_block
or_next_if_better
endmatch
match $__XILINX_RAMB18_TDP
attribute ram_style=block ram_block=1
attribute !ram_style=distributed
attribute !logic_block
min bits 1024
min efficiency 5
shuffle_enable B
make_transp
attribute !ram_style !logic_block
or_next_if_better
endmatch
match $__XILINX_RAMB18_TDP
min efficiency 5
shuffle_enable B
make_transp
attribute ram_block=1 ram_style=block
endmatch