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Completed ngspice digital example with verilog tb
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examples/cmos/README
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examples/cmos/README
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In this directory you will find out, how to generate a spice output
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operating in two modes, analog or event-driven mode supported by ngspice
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xspice sub-module.
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Each test bench can be run separately by either running:
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- testbench.sh, to start analog simulation or
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- testbench_digital.sh for mixed-signal digital simulation.
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The later case also includes pure verilog simulation using the iverilog
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and gtkwave to represent the results.
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