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https://github.com/YosysHQ/yosys
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opt_dff: sigmap bits before looking up muxes
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parent
6f3376cbe6
commit
b30211c60a
1 changed files with 23 additions and 12 deletions
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@ -29,6 +29,7 @@
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#include "passes/techmap/simplemap.h"
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#include "passes/techmap/simplemap.h"
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <optional>
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USING_YOSYS_NAMESPACE
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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PRIVATE_NAMESPACE_BEGIN
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@ -95,6 +96,18 @@ struct OptDffWorker
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}
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}
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// If this bit sigmaps to a bit driven by a mux ouput bit that only drives this
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// bit, returns that mux otherwise nullopt
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std::optional<cell_int_t> mergeable_mux(SigBit bit) {
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sigmap.apply(bit);
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auto it = bit2mux.find(bit);
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if (it == bit2mux.end() || bitusers[bit] != 1)
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return std::nullopt;
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return it->second;
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}
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State combine_const(State a, State b) {
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State combine_const(State a, State b) {
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if (a == State::Sx && !opt.keepdc)
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if (a == State::Sx && !opt.keepdc)
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return b;
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return b;
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@ -591,13 +604,12 @@ struct OptDffWorker
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State reset_val = State::Sx;
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State reset_val = State::Sx;
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if (ff.has_srst)
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if (ff.has_srst)
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reset_val = ff.val_srst[i];
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reset_val = ff.val_srst[i];
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while (bit2mux.count(ff.sig_d[i]) && bitusers[ff.sig_d[i]] == 1) {
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while (const auto mbit = mergeable_mux(ff.sig_d[i])) {
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cell_int_t mbit = bit2mux.at(ff.sig_d[i]);
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if (GetSize(mbit->first->getPort(ID::S)) != 1)
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if (GetSize(mbit.first->getPort(ID::S)) != 1)
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break;
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break;
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SigBit s = mbit.first->getPort(ID::S);
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SigBit s = mbit->first->getPort(ID::S);
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SigBit a = mbit.first->getPort(ID::A)[mbit.second];
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SigBit a = mbit->first->getPort(ID::A)[mbit->second];
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SigBit b = mbit.first->getPort(ID::B)[mbit.second];
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SigBit b = mbit->first->getPort(ID::B)[mbit->second];
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// Workaround for funny memory WE pattern.
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// Workaround for funny memory WE pattern.
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if ((a == State::S0 || a == State::S1) && (b == State::S0 || b == State::S1))
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if ((a == State::S0 || a == State::S1) && (b == State::S0 || b == State::S1))
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break;
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break;
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@ -668,13 +680,12 @@ struct OptDffWorker
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for (int i = 0 ; i < ff.width; i++) {
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for (int i = 0 ; i < ff.width; i++) {
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// First, eat up as many simple muxes as possible.
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// First, eat up as many simple muxes as possible.
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ctrls_t enables;
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ctrls_t enables;
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while (bit2mux.count(ff.sig_d[i]) && bitusers[ff.sig_d[i]] == 1) {
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while (const auto mbit = mergeable_mux(ff.sig_d[i])) {
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cell_int_t mbit = bit2mux.at(ff.sig_d[i]);
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if (GetSize(mbit->first->getPort(ID::S)) != 1)
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if (GetSize(mbit.first->getPort(ID::S)) != 1)
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break;
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break;
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SigBit s = mbit.first->getPort(ID::S);
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SigBit s = mbit->first->getPort(ID::S);
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SigBit a = mbit.first->getPort(ID::A)[mbit.second];
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SigBit a = mbit->first->getPort(ID::A)[mbit->second];
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SigBit b = mbit.first->getPort(ID::B)[mbit.second];
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SigBit b = mbit->first->getPort(ID::B)[mbit->second];
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if (a == ff.sig_q[i]) {
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if (a == ff.sig_q[i]) {
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enables.insert(ctrl_t(s, true));
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enables.insert(ctrl_t(s, true));
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ff.sig_d[i] = b;
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ff.sig_d[i] = b;
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