3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-03-02 03:36:56 +00:00

modtools, wreduce: check_db sanity check

This commit is contained in:
Emil J. Tywoniak 2026-02-17 19:52:30 +01:00
parent c75d80905a
commit b1a997aa9a
2 changed files with 10 additions and 0 deletions

View file

@ -489,6 +489,7 @@ struct WreduceWorker
for (auto w : module->wires())
complete_wires.insert(mi.sigmap(w));
mi.dump_db();
for (auto w : module->selected_wires())
{
int unused_top_bits = 0;
@ -496,6 +497,8 @@ struct WreduceWorker
if (w->port_id > 0 || count_nontrivial_wire_attrs(w) > 0)
continue;
log_debug("wire %s\n", w->name);
mi.check_db();
for (int i = GetSize(w)-1; i >= 0; i--) {
SigBit bit(w, i);
auto info = mi.query(bit);