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sv: fix some edge cases for unbased unsized literals

- Fix explicit size cast of unbased unsized literals
- Fix unbased unsized literal bound directly to port
- Output `is_unsized` flag in `dumpAst`
This commit is contained in:
Zachary Snow 2021-03-03 14:36:19 -05:00 committed by Zachary Snow
parent d245e2bae5
commit b1a8e73a60
4 changed files with 70 additions and 1 deletions

View file

@ -317,6 +317,8 @@ void AstNode::dumpAst(FILE *f, std::string indent) const
fprintf(f, " reg");
if (is_signed)
fprintf(f, " signed");
if (is_unsized)
fprintf(f, " unsized");
if (basic_prep)
fprintf(f, " basic_prep");
if (lookahead)

View file

@ -915,6 +915,22 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
}
}
if (type == AST_ARGUMENT)
{
if (children.size() == 1 && children[0]->type == AST_CONSTANT)
{
// HACK: For port bindings using unbased unsized literals, mark them
// signed so they sign-extend. The hierarchy will still incorrectly
// generate a warning complaining about resizing the expression.
// This also doesn't handle the complex of something like a ternary
// expression bound to a port, where the actual size of the port is
// needed to resolve the expression correctly.
AstNode *arg = children[0];
if (arg->is_unsized)
arg->is_signed = true;
}
}
int backup_width_hint = width_hint;
bool backup_sign_hint = sign_hint;
@ -3773,7 +3789,11 @@ replace_fcall_later:;
case AST_CAST_SIZE:
if (children.at(0)->type == AST_CONSTANT && children.at(1)->type == AST_CONSTANT) {
int width = children[0]->bitsAsConst().as_int();
RTLIL::Const val = children[1]->bitsAsConst(width);
RTLIL::Const val;
if (children[1]->is_unsized)
val = children[1]->bitsAsUnsizedConst(width);
else
val = children[1]->bitsAsConst(width);
newNode = mkconst_bits(val.bits, children[1]->is_signed);
}
break;