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sv: fix some edge cases for unbased unsized literals
- Fix explicit size cast of unbased unsized literals - Fix unbased unsized literal bound directly to port - Output `is_unsized` flag in `dumpAst`
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d245e2bae5
commit
b1a8e73a60
4 changed files with 70 additions and 1 deletions
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@ -317,6 +317,8 @@ void AstNode::dumpAst(FILE *f, std::string indent) const
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fprintf(f, " reg");
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if (is_signed)
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fprintf(f, " signed");
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if (is_unsized)
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fprintf(f, " unsized");
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if (basic_prep)
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fprintf(f, " basic_prep");
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if (lookahead)
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@ -915,6 +915,22 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
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}
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}
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if (type == AST_ARGUMENT)
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{
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if (children.size() == 1 && children[0]->type == AST_CONSTANT)
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{
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// HACK: For port bindings using unbased unsized literals, mark them
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// signed so they sign-extend. The hierarchy will still incorrectly
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// generate a warning complaining about resizing the expression.
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// This also doesn't handle the complex of something like a ternary
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// expression bound to a port, where the actual size of the port is
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// needed to resolve the expression correctly.
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AstNode *arg = children[0];
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if (arg->is_unsized)
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arg->is_signed = true;
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}
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}
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int backup_width_hint = width_hint;
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bool backup_sign_hint = sign_hint;
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@ -3773,7 +3789,11 @@ replace_fcall_later:;
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case AST_CAST_SIZE:
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if (children.at(0)->type == AST_CONSTANT && children.at(1)->type == AST_CONSTANT) {
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int width = children[0]->bitsAsConst().as_int();
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RTLIL::Const val = children[1]->bitsAsConst(width);
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RTLIL::Const val;
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if (children[1]->is_unsized)
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val = children[1]->bitsAsUnsizedConst(width);
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else
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val = children[1]->bitsAsConst(width);
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newNode = mkconst_bits(val.bits, children[1]->is_signed);
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}
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break;
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