mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-24 01:25:33 +00:00
Changes for Verific 3.16_484_32_151112
This commit is contained in:
parent
fd3e10c295
commit
b18f3a2974
3 changed files with 7 additions and 4 deletions
2
Makefile
2
Makefile
|
@ -179,7 +179,7 @@ endif
|
|||
|
||||
ifeq ($(ENABLE_VERIFIC),1)
|
||||
VERIFIC_DIR ?= /usr/local/src/verific_lib_eval
|
||||
VERIFIC_COMPONENTS ?= verilog vhdl database util containers
|
||||
VERIFIC_COMPONENTS ?= verilog vhdl database util containers sdf
|
||||
CXXFLAGS += $(patsubst %,-I$(VERIFIC_DIR)/%,$(VERIFIC_COMPONENTS)) -DYOSYS_ENABLE_VERIFIC
|
||||
LDLIBS += $(patsubst %,$(VERIFIC_DIR)/%/*-linux.a,$(VERIFIC_COMPONENTS))
|
||||
endif
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue