3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-24 01:25:33 +00:00

Setup tests/verilog properly

This commit is contained in:
Eddie Hung 2020-05-11 10:30:20 -07:00
parent aafaeb66df
commit b11cf67a81
3 changed files with 24 additions and 0 deletions

View file

@ -780,6 +780,7 @@ test: $(TARGETS) $(EXTRA_TARGETS)
+cd tests/arch/intel_alm && bash run-test.sh $(SEEDOPT)
+cd tests/rpc && bash run-test.sh
+cd tests/memfile && bash run-test.sh
+cd tests/verilog && bash run-test.sh
@echo ""
@echo " Passed \"make test\"."
@echo ""