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cxxrtl: expose port direction in debug information.

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This can be useful to distinguish e.g. a combinatorially driven wire
with type `CXXRTL_VALUE` from a module input with the same type, as
well as general introspection.
This commit is contained in:
whitequark 2020-09-02 15:18:44 +00:00
parent 8d6e5c6391
commit b025ee0aa6
3 changed files with 51 additions and 5 deletions
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9
backends/cxxrtl/cxxrtl_backend.cc
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@ -1662,7 +1662,14 @@ struct CxxrtlWorker {
// Member wire
f << indent << "items.add(path + " << escape_cxx_string(get_hdl_name(wire));
f << ", debug_item(" << mangle(wire) << ", ";
f << wire->start_offset << "));\n";
f << wire->start_offset;
if (wire->port_input && wire->port_output)
f << ", debug_item::INOUT";
else if (wire->port_input)
f << ", debug_item::INPUT";
else if (wire->port_output)
f << ", debug_item::OUTPUT";
f << "));\n";
count_member_wires++;
} else {
count_skipped_wires++;