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cxxrtl: expose port direction in debug information.
This can be useful to distinguish e.g. a combinatorially driven wire with type `CXXRTL_VALUE` from a module input with the same type, as well as general introspection.
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parent
8d6e5c6391
commit
b025ee0aa6
3 changed files with 51 additions and 5 deletions
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@ -452,7 +452,7 @@ struct value : public expr_base<value<Bits>> {
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bool carry = CarryIn;
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for (size_t n = 0; n < result.chunks; n++) {
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result.data[n] = data[n] + (Invert ? ~other.data[n] : other.data[n]) + carry;
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if (result.chunks - 1 == n)
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if (result.chunks - 1 == n)
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result.data[result.chunks - 1] &= result.msb_mask;
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carry = (result.data[n] < data[n]) ||
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(result.data[n] == data[n] && carry);
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@ -824,6 +824,7 @@ struct debug_alias {};
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// To avoid violating strict aliasing rules, this structure has to be a subclass of the one used
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// in the C API, or it would not be possible to cast between the pointers to these.
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struct debug_item : ::cxxrtl_object {
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// Object types.
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enum : uint32_t {
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VALUE = CXXRTL_VALUE,
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WIRE = CXXRTL_WIRE,
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@ -831,13 +832,21 @@ struct debug_item : ::cxxrtl_object {
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ALIAS = CXXRTL_ALIAS,
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};
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// Object flags.
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enum : uint32_t {
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INPUT = CXXRTL_INPUT,
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OUTPUT = CXXRTL_OUTPUT,
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INOUT = CXXRTL_INOUT,
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};
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debug_item(const ::cxxrtl_object &object) : cxxrtl_object(object) {}
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template<size_t Bits>
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debug_item(value<Bits> &item, size_t lsb_offset = 0) {
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debug_item(value<Bits> &item, size_t lsb_offset = 0, uint32_t flags_ = 0) {
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static_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),
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"value<Bits> is not compatible with C layout");
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type = VALUE;
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flags = flags_;
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width = Bits;
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lsb_at = lsb_offset;
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depth = 1;
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@ -847,10 +856,11 @@ struct debug_item : ::cxxrtl_object {
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}
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template<size_t Bits>
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debug_item(const value<Bits> &item, size_t lsb_offset = 0) {
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debug_item(const value<Bits> &item, size_t lsb_offset = 0, uint32_t flags_ = 0) {
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static_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),
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"value<Bits> is not compatible with C layout");
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type = VALUE;
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flags = flags_;
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width = Bits;
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lsb_at = lsb_offset;
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depth = 1;
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@ -860,11 +870,12 @@ struct debug_item : ::cxxrtl_object {
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}
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template<size_t Bits>
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debug_item(wire<Bits> &item, size_t lsb_offset = 0) {
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debug_item(wire<Bits> &item, size_t lsb_offset = 0, uint32_t flags_ = 0) {
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static_assert(sizeof(item.curr) == value<Bits>::chunks * sizeof(chunk_t) &&
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sizeof(item.next) == value<Bits>::chunks * sizeof(chunk_t),
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"wire<Bits> is not compatible with C layout");
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type = WIRE;
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flags = flags_;
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width = Bits;
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lsb_at = lsb_offset;
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depth = 1;
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@ -878,6 +889,7 @@ struct debug_item : ::cxxrtl_object {
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static_assert(sizeof(item.data[0]) == value<Width>::chunks * sizeof(chunk_t),
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"memory<Width> is not compatible with C layout");
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type = MEMORY;
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flags = 0;
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width = Width;
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lsb_at = 0;
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depth = item.data.size();
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@ -891,6 +903,7 @@ struct debug_item : ::cxxrtl_object {
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static_assert(sizeof(item) == value<Bits>::chunks * sizeof(chunk_t),
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"value<Bits> is not compatible with C layout");
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type = ALIAS;
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flags = 0;
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width = Bits;
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lsb_at = lsb_offset;
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depth = 1;
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@ -905,6 +918,7 @@ struct debug_item : ::cxxrtl_object {
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sizeof(item.next) == value<Bits>::chunks * sizeof(chunk_t),
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"wire<Bits> is not compatible with C layout");
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type = ALIAS;
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flags = 0;
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width = Bits;
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lsb_at = lsb_offset;
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depth = 1;
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