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Towards DRAM support in Xilinx flow

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This commit is contained in:
Clifford Wolf 2015-04-09 08:17:14 +02:00
parent 21a1cc1b60
commit b00cad81d7
5 changed files with 78 additions and 0 deletions
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techlibs/xilinx/Makefile.inc
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@ -27,5 +27,8 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_32.vh))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_18.vh))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_init_16.vh))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_bb.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/drams_bb.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v))