mirror of
https://github.com/YosysHQ/yosys
synced 2026-07-22 15:15:51 +00:00
WIP
This commit is contained in:
Emil J. Tywoniak
parent
8e522b08c0
commit
afdae7b87e
49 changed files with 1258 additions and 891 deletions
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@ -27,7 +27,7 @@ YOSYS_NAMESPACE_BEGIN
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struct CellType
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{
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RTLIL::IdString type;
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TwineRef type;
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pool<TwineRef> inputs, outputs;
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bool is_evaluable;
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bool is_combinatorial;
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@ -36,7 +36,7 @@ struct CellType
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struct CellTypes
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{
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dict<RTLIL::IdString, CellType> cell_types;
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dict<TwineRef, CellType> cell_types;
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CellTypes()
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{
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@ -59,7 +59,7 @@ struct CellTypes
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setup_stdcells_mem();
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}
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void setup_type(RTLIL::IdString type, const pool<TwineRef> &inputs, const pool<TwineRef> &outputs, bool is_evaluable = false, bool is_combinatorial = false, bool is_synthesizable = false)
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void setup_type(TwineRef type, const pool<TwineRef> &inputs, const pool<TwineRef> &outputs, bool is_evaluable = false, bool is_combinatorial = false, bool is_synthesizable = false)
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{
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CellType ct = {type, inputs, outputs, is_evaluable, is_combinatorial, is_synthesizable};
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cell_types[ct.type] = ct;
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@ -75,7 +75,7 @@ struct CellTypes
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if (wire->port_output)
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outputs.insert(wire->meta_->name);
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}
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setup_type(RTLIL::IdString(module->design->twines.str(module->meta_->name)), inputs, outputs);
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setup_type(module->meta_->name, inputs, outputs);
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}
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void setup_design(RTLIL::Design *design)
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@ -88,51 +88,51 @@ struct CellTypes
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{
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setup_internals_eval();
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setup_type(ID($tribuf), {TW::A, TW::EN}, {TW::Y});
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setup_type(TW($tribuf), {TW::A, TW::EN}, {TW::Y});
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setup_type(ID($assert), {TW::A, TW::EN}, pool<TwineRef>());
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setup_type(ID($assume), {TW::A, TW::EN}, pool<TwineRef>());
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setup_type(ID($live), {TW::A, TW::EN}, pool<TwineRef>());
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setup_type(ID($fair), {TW::A, TW::EN}, pool<TwineRef>());
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setup_type(ID($cover), {TW::A, TW::EN}, pool<TwineRef>());
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setup_type(ID($initstate), pool<TwineRef>(), {TW::Y});
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setup_type(ID($anyconst), pool<TwineRef>(), {TW::Y});
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setup_type(ID($anyseq), pool<TwineRef>(), {TW::Y});
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setup_type(ID($allconst), pool<TwineRef>(), {TW::Y});
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setup_type(ID($allseq), pool<TwineRef>(), {TW::Y});
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setup_type(ID($equiv), {TW::A, TW::B}, {TW::Y});
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setup_type(ID($specify2), {TW::EN, TW::SRC, TW::DST}, pool<TwineRef>());
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setup_type(ID($specify3), {TW::EN, TW::SRC, TW::DST, TW::DAT}, pool<TwineRef>());
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setup_type(ID($specrule), {TW::SRC_EN, TW::DST_EN, TW::SRC, TW::DST}, pool<TwineRef>());
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setup_type(ID($print), {TW::EN, TW::ARGS, TW::TRG}, pool<TwineRef>());
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setup_type(ID($check), {TW::A, TW::EN, TW::ARGS, TW::TRG}, pool<TwineRef>());
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setup_type(ID($set_tag), {TW::A, TW::SET, TW::CLR}, {TW::Y});
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setup_type(ID($get_tag), {TW::A}, {TW::Y});
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setup_type(ID($overwrite_tag), {TW::A, TW::SET, TW::CLR}, pool<TwineRef>());
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setup_type(ID($original_tag), {TW::A}, {TW::Y});
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setup_type(ID($future_ff), {TW::A}, {TW::Y});
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setup_type(ID($scopeinfo), {}, {});
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setup_type(ID($input_port), {}, {TW::Y});
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setup_type(ID($output_port), {TW::A}, {});
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setup_type(ID($public), {TW::A}, {});
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setup_type(ID($connect), {TW::A, TW::B}, {});
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setup_type(TW($assert), {TW::A, TW::EN}, pool<TwineRef>());
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setup_type(TW($assume), {TW::A, TW::EN}, pool<TwineRef>());
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setup_type(TW($live), {TW::A, TW::EN}, pool<TwineRef>());
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setup_type(TW($fair), {TW::A, TW::EN}, pool<TwineRef>());
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setup_type(TW($cover), {TW::A, TW::EN}, pool<TwineRef>());
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setup_type(TW($initstate), pool<TwineRef>(), {TW::Y});
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setup_type(TW($anyconst), pool<TwineRef>(), {TW::Y});
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setup_type(TW($anyseq), pool<TwineRef>(), {TW::Y});
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setup_type(TW($allconst), pool<TwineRef>(), {TW::Y});
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setup_type(TW($allseq), pool<TwineRef>(), {TW::Y});
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setup_type(TW($equiv), {TW::A, TW::B}, {TW::Y});
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setup_type(TW($specify2), {TW::EN, TW::SRC, TW::DST}, pool<TwineRef>());
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setup_type(TW($specify3), {TW::EN, TW::SRC, TW::DST, TW::DAT}, pool<TwineRef>());
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setup_type(TW($specrule), {TW::SRC_EN, TW::DST_EN, TW::SRC, TW::DST}, pool<TwineRef>());
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setup_type(TW($print), {TW::EN, TW::ARGS, TW::TRG}, pool<TwineRef>());
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setup_type(TW($check), {TW::A, TW::EN, TW::ARGS, TW::TRG}, pool<TwineRef>());
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setup_type(TW($set_tag), {TW::A, TW::SET, TW::CLR}, {TW::Y});
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setup_type(TW($get_tag), {TW::A}, {TW::Y});
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setup_type(TW($overwrite_tag), {TW::A, TW::SET, TW::CLR}, pool<TwineRef>());
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setup_type(TW($original_tag), {TW::A}, {TW::Y});
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setup_type(TW($future_ff), {TW::A}, {TW::Y});
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setup_type(TW($scopeinfo), {}, {});
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setup_type(TW($input_port), {}, {TW::Y});
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setup_type(TW($output_port), {TW::A}, {});
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setup_type(TW($public), {TW::A}, {});
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setup_type(TW($connect), {TW::A, TW::B}, {});
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}
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void setup_internals_eval()
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{
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std::vector<RTLIL::IdString> unary_ops = {
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ID($not), ID($pos), ID($buf), ID($neg),
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ID($reduce_and), ID($reduce_or), ID($reduce_xor), ID($reduce_xnor), ID($reduce_bool),
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ID($logic_not), ID($slice), ID($lut), ID($sop)
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std::vector<TwineRef> unary_ops = {
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TW($not), TW($pos), TW($buf), TW($neg),
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TW($reduce_and), TW($reduce_or), TW($reduce_xor), TW($reduce_xnor), TW($reduce_bool),
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TW($logic_not), TW($slice), TW($lut), TW($sop)
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};
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std::vector<RTLIL::IdString> binary_ops = {
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ID($and), ID($or), ID($xor), ID($xnor),
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ID($shl), ID($shr), ID($sshl), ID($sshr), ID($shift), ID($shiftx),
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ID($lt), ID($le), ID($eq), ID($ne), ID($eqx), ID($nex), ID($ge), ID($gt),
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ID($add), ID($sub), ID($mul), ID($div), ID($mod), ID($divfloor), ID($modfloor), ID($pow),
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ID($logic_and), ID($logic_or), ID($concat), ID($macc),
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ID($bweqx)
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std::vector<TwineRef> binary_ops = {
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TW($and), TW($or), TW($xor), TW($xnor),
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TW($shl), TW($shr), TW($sshl), TW($sshr), TW($shift), TW($shiftx),
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TW($lt), TW($le), TW($eq), TW($ne), TW($eqx), TW($nex), TW($ge), TW($gt),
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TW($add), TW($sub), TW($mul), TW($div), TW($mod), TW($divfloor), TW($modfloor), TW($pow),
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TW($logic_and), TW($logic_or), TW($concat), TW($macc),
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TW($bweqx)
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};
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for (auto type : unary_ops)
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@ -141,87 +141,87 @@ struct CellTypes
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for (auto type : binary_ops)
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setup_type(type, {TW::A, TW::B}, {TW::Y}, true);
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for (auto type : std::vector<RTLIL::IdString>({ID($mux), ID($pmux), ID($bwmux)}))
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for (auto type : std::vector<TwineRef>({TW($mux), TW($pmux), TW($bwmux)}))
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setup_type(type, {TW::A, TW::B, TW::S}, {TW::Y}, true);
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for (auto type : std::vector<RTLIL::IdString>({ID($bmux), ID($demux)}))
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for (auto type : std::vector<TwineRef>({TW($bmux), TW($demux)}))
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setup_type(type, {TW::A, TW::S}, {TW::Y}, true);
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setup_type(ID($lcu), {TW::P, TW::G, TW::CI}, {TW::CO}, true);
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setup_type(ID($alu), {TW::A, TW::B, TW::CI, TW::BI}, {TW::X, TW::Y, TW::CO}, true);
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setup_type(ID($macc_v2), {TW::A, TW::B, TW::C}, {TW::Y}, true);
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setup_type(ID($fa), {TW::A, TW::B, TW::C}, {TW::X, TW::Y}, true);
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setup_type(TW($lcu), {TW::P, TW::G, TW::CI}, {TW::CO}, true);
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setup_type(TW($alu), {TW::A, TW::B, TW::CI, TW::BI}, {TW::X, TW::Y, TW::CO}, true);
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setup_type(TW($macc_v2), {TW::A, TW::B, TW::C}, {TW::Y}, true);
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setup_type(TW($fa), {TW::A, TW::B, TW::C}, {TW::X, TW::Y}, true);
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}
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void setup_internals_ff()
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{
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setup_type(ID($sr), {TW::SET, TW::CLR}, {TW::Q});
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setup_type(ID($ff), {TW::D}, {TW::Q});
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setup_type(ID($dff), {TW::CLK, TW::D}, {TW::Q});
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setup_type(ID($dffe), {TW::CLK, TW::EN, TW::D}, {TW::Q});
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setup_type(ID($dffsr), {TW::CLK, TW::SET, TW::CLR, TW::D}, {TW::Q});
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setup_type(ID($dffsre), {TW::CLK, TW::SET, TW::CLR, TW::D, TW::EN}, {TW::Q});
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setup_type(ID($adff), {TW::CLK, TW::ARST, TW::D}, {TW::Q});
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setup_type(ID($adffe), {TW::CLK, TW::ARST, TW::D, TW::EN}, {TW::Q});
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setup_type(ID($aldff), {TW::CLK, TW::ALOAD, TW::AD, TW::D}, {TW::Q});
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setup_type(ID($aldffe), {TW::CLK, TW::ALOAD, TW::AD, TW::D, TW::EN}, {TW::Q});
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setup_type(ID($sdff), {TW::CLK, TW::SRST, TW::D}, {TW::Q});
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setup_type(ID($sdffe), {TW::CLK, TW::SRST, TW::D, TW::EN}, {TW::Q});
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setup_type(ID($sdffce), {TW::CLK, TW::SRST, TW::D, TW::EN}, {TW::Q});
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setup_type(ID($dlatch), {TW::EN, TW::D}, {TW::Q});
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setup_type(ID($adlatch), {TW::EN, TW::D, TW::ARST}, {TW::Q});
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setup_type(ID($dlatchsr), {TW::EN, TW::SET, TW::CLR, TW::D}, {TW::Q});
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setup_type(TW($sr), {TW::SET, TW::CLR}, {TW::Q});
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setup_type(TW($ff), {TW::D}, {TW::Q});
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setup_type(TW($dff), {TW::CLK, TW::D}, {TW::Q});
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setup_type(TW($dffe), {TW::CLK, TW::EN, TW::D}, {TW::Q});
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setup_type(TW($dffsr), {TW::CLK, TW::SET, TW::CLR, TW::D}, {TW::Q});
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setup_type(TW($dffsre), {TW::CLK, TW::SET, TW::CLR, TW::D, TW::EN}, {TW::Q});
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setup_type(TW($adff), {TW::CLK, TW::ARST, TW::D}, {TW::Q});
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setup_type(TW($adffe), {TW::CLK, TW::ARST, TW::D, TW::EN}, {TW::Q});
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setup_type(TW($aldff), {TW::CLK, TW::ALOAD, TW::AD, TW::D}, {TW::Q});
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setup_type(TW($aldffe), {TW::CLK, TW::ALOAD, TW::AD, TW::D, TW::EN}, {TW::Q});
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setup_type(TW($sdff), {TW::CLK, TW::SRST, TW::D}, {TW::Q});
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setup_type(TW($sdffe), {TW::CLK, TW::SRST, TW::D, TW::EN}, {TW::Q});
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setup_type(TW($sdffce), {TW::CLK, TW::SRST, TW::D, TW::EN}, {TW::Q});
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setup_type(TW($dlatch), {TW::EN, TW::D}, {TW::Q});
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setup_type(TW($adlatch), {TW::EN, TW::D, TW::ARST}, {TW::Q});
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setup_type(TW($dlatchsr), {TW::EN, TW::SET, TW::CLR, TW::D}, {TW::Q});
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}
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void setup_internals_anyinit()
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{
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setup_type(ID($anyinit), {TW::D}, {TW::Q});
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setup_type(TW($anyinit), {TW::D}, {TW::Q});
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}
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void setup_internals_mem()
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{
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setup_internals_ff();
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setup_type(ID($memrd), {TW::CLK, TW::EN, TW::ADDR}, {TW::DATA});
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setup_type(ID($memrd_v2), {TW::CLK, TW::EN, TW::ARST, TW::SRST, TW::ADDR}, {TW::DATA});
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setup_type(ID($memwr), {TW::CLK, TW::EN, TW::ADDR, TW::DATA}, pool<TwineRef>());
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setup_type(ID($memwr_v2), {TW::CLK, TW::EN, TW::ADDR, TW::DATA}, pool<TwineRef>());
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setup_type(ID($meminit), {TW::ADDR, TW::DATA}, pool<TwineRef>());
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setup_type(ID($meminit_v2), {TW::ADDR, TW::DATA, TW::EN}, pool<TwineRef>());
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setup_type(ID($mem), {TW::RD_CLK, TW::RD_EN, TW::RD_ADDR, TW::WR_CLK, TW::WR_EN, TW::WR_ADDR, TW::WR_DATA}, {TW::RD_DATA});
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setup_type(ID($mem_v2), {TW::RD_CLK, TW::RD_EN, TW::RD_ARST, TW::RD_SRST, TW::RD_ADDR, TW::WR_CLK, TW::WR_EN, TW::WR_ADDR, TW::WR_DATA}, {TW::RD_DATA});
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setup_type(TW($memrd), {TW::CLK, TW::EN, TW::ADDR}, {TW::DATA});
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setup_type(TW($memrd_v2), {TW::CLK, TW::EN, TW::ARST, TW::SRST, TW::ADDR}, {TW::DATA});
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setup_type(TW($memwr), {TW::CLK, TW::EN, TW::ADDR, TW::DATA}, pool<TwineRef>());
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setup_type(TW($memwr_v2), {TW::CLK, TW::EN, TW::ADDR, TW::DATA}, pool<TwineRef>());
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setup_type(TW($meminit), {TW::ADDR, TW::DATA}, pool<TwineRef>());
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setup_type(TW($meminit_v2), {TW::ADDR, TW::DATA, TW::EN}, pool<TwineRef>());
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setup_type(TW($mem), {TW::RD_CLK, TW::RD_EN, TW::RD_ADDR, TW::WR_CLK, TW::WR_EN, TW::WR_ADDR, TW::WR_DATA}, {TW::RD_DATA});
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setup_type(TW($mem_v2), {TW::RD_CLK, TW::RD_EN, TW::RD_ARST, TW::RD_SRST, TW::RD_ADDR, TW::WR_CLK, TW::WR_EN, TW::WR_ADDR, TW::WR_DATA}, {TW::RD_DATA});
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setup_type(ID($fsm), {TW::CLK, TW::ARST, TW::CTRL_IN}, {TW::CTRL_OUT});
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setup_type(TW($fsm), {TW::CLK, TW::ARST, TW::CTRL_IN}, {TW::CTRL_OUT});
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}
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void setup_stdcells()
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{
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setup_stdcells_eval();
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setup_type(ID($_TBUF_), {TW::A, TW::E}, {TW::Y});
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setup_type(TW($_TBUF_), {TW::A, TW::E}, {TW::Y});
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}
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void setup_stdcells_eval()
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{
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setup_type(ID($_BUF_), {TW::A}, {TW::Y}, true);
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setup_type(ID($_NOT_), {TW::A}, {TW::Y}, true);
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setup_type(ID($_AND_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(ID($_NAND_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(ID($_OR_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(ID($_NOR_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(ID($_XOR_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(ID($_XNOR_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(ID($_ANDNOT_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(ID($_ORNOT_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(ID($_MUX_), {TW::A, TW::B, TW::S}, {TW::Y}, true);
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setup_type(ID($_NMUX_), {TW::A, TW::B, TW::S}, {TW::Y}, true);
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setup_type(ID($_MUX4_), {TW::A, TW::B, TW::C, TW::D, TW::S, TW::T}, {TW::Y}, true);
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setup_type(ID($_MUX8_), {TW::A, TW::B, TW::C, TW::D, TW::E, TW::F, TW::G, TW::H, TW::S, TW::T, TW::U}, {TW::Y}, true);
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setup_type(ID($_MUX16_), {TW::A, TW::B, TW::C, TW::D, TW::E, TW::F, TW::G, TW::H, TW::I, TW::J, TW::K, TW::L, TW::M, TW::N, TW::O, TW::P, TW::S, TW::T, TW::U, TW::V}, {TW::Y}, true);
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setup_type(ID($_AOI3_), {TW::A, TW::B, TW::C}, {TW::Y}, true);
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setup_type(ID($_OAI3_), {TW::A, TW::B, TW::C}, {TW::Y}, true);
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setup_type(ID($_AOI4_), {TW::A, TW::B, TW::C, TW::D}, {TW::Y}, true);
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setup_type(ID($_OAI4_), {TW::A, TW::B, TW::C, TW::D}, {TW::Y}, true);
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setup_type(TW($_BUF_), {TW::A}, {TW::Y}, true);
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setup_type(TW($_NOT_), {TW::A}, {TW::Y}, true);
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setup_type(TW($_AND_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(TW($_NAND_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(TW($_OR_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(TW($_NOR_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(TW($_XOR_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(TW($_XNOR_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(TW($_ANDNOT_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(TW($_ORNOT_), {TW::A, TW::B}, {TW::Y}, true);
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setup_type(TW($_MUX_), {TW::A, TW::B, TW::S}, {TW::Y}, true);
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setup_type(TW($_NMUX_), {TW::A, TW::B, TW::S}, {TW::Y}, true);
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setup_type(TW($_MUX4_), {TW::A, TW::B, TW::C, TW::D, TW::S, TW::T}, {TW::Y}, true);
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setup_type(TW($_MUX8_), {TW::A, TW::B, TW::C, TW::D, TW::E, TW::F, TW::G, TW::H, TW::S, TW::T, TW::U}, {TW::Y}, true);
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setup_type(TW($_MUX16_), {TW::A, TW::B, TW::C, TW::D, TW::E, TW::F, TW::G, TW::H, TW::I, TW::J, TW::K, TW::L, TW::M, TW::N, TW::O, TW::P, TW::S, TW::T, TW::U, TW::V}, {TW::Y}, true);
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setup_type(TW($_AOI3_), {TW::A, TW::B, TW::C}, {TW::Y}, true);
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setup_type(TW($_OAI3_), {TW::A, TW::B, TW::C}, {TW::Y}, true);
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setup_type(TW($_AOI4_), {TW::A, TW::B, TW::C, TW::D}, {TW::Y}, true);
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||||
setup_type(TW($_OAI4_), {TW::A, TW::B, TW::C, TW::D}, {TW::Y}, true);
|
||||
}
|
||||
|
||||
void setup_stdcells_mem()
|
||||
|
|
@ -230,77 +230,77 @@ struct CellTypes
|
|||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
setup_type(stringf("$_SR_%c%c_", c1, c2), {TW::S, TW::R}, {TW::Q});
|
||||
setup_type(TW($1), {TW::S, TW::R}, {TW::Q});
|
||||
|
||||
setup_type(ID($_FF_), {TW::D}, {TW::Q});
|
||||
setup_type(TW($_FF_), {TW::D}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
setup_type(stringf("$_DFF_%c_", c1), {TW::C, TW::D}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::D}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
setup_type(stringf("$_DFFE_%c%c_", c1, c2), {TW::C, TW::D, TW::E}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::D, TW::E}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
for (auto c3 : list_01)
|
||||
setup_type(stringf("$_DFF_%c%c%c_", c1, c2, c3), {TW::C, TW::R, TW::D}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::R, TW::D}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
for (auto c3 : list_01)
|
||||
for (auto c4 : list_np)
|
||||
setup_type(stringf("$_DFFE_%c%c%c%c_", c1, c2, c3, c4), {TW::C, TW::R, TW::D, TW::E}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::R, TW::D, TW::E}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
setup_type(stringf("$_ALDFF_%c%c_", c1, c2), {TW::C, TW::L, TW::AD, TW::D}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::L, TW::AD, TW::D}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
for (auto c3 : list_np)
|
||||
setup_type(stringf("$_ALDFFE_%c%c%c_", c1, c2, c3), {TW::C, TW::L, TW::AD, TW::D, TW::E}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::L, TW::AD, TW::D, TW::E}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
for (auto c3 : list_np)
|
||||
setup_type(stringf("$_DFFSR_%c%c%c_", c1, c2, c3), {TW::C, TW::S, TW::R, TW::D}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::S, TW::R, TW::D}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
for (auto c3 : list_np)
|
||||
for (auto c4 : list_np)
|
||||
setup_type(stringf("$_DFFSRE_%c%c%c%c_", c1, c2, c3, c4), {TW::C, TW::S, TW::R, TW::D, TW::E}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::S, TW::R, TW::D, TW::E}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
for (auto c3 : list_01)
|
||||
setup_type(stringf("$_SDFF_%c%c%c_", c1, c2, c3), {TW::C, TW::R, TW::D}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::R, TW::D}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
for (auto c3 : list_01)
|
||||
for (auto c4 : list_np)
|
||||
setup_type(stringf("$_SDFFE_%c%c%c%c_", c1, c2, c3, c4), {TW::C, TW::R, TW::D, TW::E}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::R, TW::D, TW::E}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
for (auto c3 : list_01)
|
||||
for (auto c4 : list_np)
|
||||
setup_type(stringf("$_SDFFCE_%c%c%c%c_", c1, c2, c3, c4), {TW::C, TW::R, TW::D, TW::E}, {TW::Q});
|
||||
setup_type(TW($1), {TW::C, TW::R, TW::D, TW::E}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
setup_type(stringf("$_DLATCH_%c_", c1), {TW::E, TW::D}, {TW::Q});
|
||||
setup_type(TW($1), {TW::E, TW::D}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
for (auto c3 : list_01)
|
||||
setup_type(stringf("$_DLATCH_%c%c%c_", c1, c2, c3), {TW::E, TW::R, TW::D}, {TW::Q});
|
||||
setup_type(TW($1), {TW::E, TW::R, TW::D}, {TW::Q});
|
||||
|
||||
for (auto c1 : list_np)
|
||||
for (auto c2 : list_np)
|
||||
for (auto c3 : list_np)
|
||||
setup_type(stringf("$_DLATCHSR_%c%c%c_", c1, c2, c3), {TW::E, TW::S, TW::R, TW::D}, {TW::Q});
|
||||
setup_type(TW($1), {TW::E, TW::S, TW::R, TW::D}, {TW::Q});
|
||||
}
|
||||
|
||||
void clear()
|
||||
|
|
@ -308,24 +308,24 @@ struct CellTypes
|
|||
cell_types.clear();
|
||||
}
|
||||
|
||||
bool cell_known(RTLIL::IdString type) const
|
||||
bool cell_known(TwineRef type) const
|
||||
{
|
||||
return cell_types.count(type) != 0;
|
||||
}
|
||||
|
||||
bool cell_output(RTLIL::IdString type, TwineRef port) const
|
||||
bool cell_output(TwineRef type, TwineRef port) const
|
||||
{
|
||||
auto it = cell_types.find(type);
|
||||
return it != cell_types.end() && it->second.outputs.count(port) != 0;
|
||||
}
|
||||
|
||||
bool cell_input(RTLIL::IdString type, TwineRef port) const
|
||||
bool cell_input(TwineRef type, TwineRef port) const
|
||||
{
|
||||
auto it = cell_types.find(type);
|
||||
return it != cell_types.end() && it->second.inputs.count(port) != 0;
|
||||
}
|
||||
|
||||
RTLIL::PortDir cell_port_dir(RTLIL::IdString type, TwineRef port) const
|
||||
RTLIL::PortDir cell_port_dir(TwineRef type, TwineRef port) const
|
||||
{
|
||||
auto it = cell_types.find(type);
|
||||
if (it == cell_types.end())
|
||||
|
|
@ -335,7 +335,7 @@ struct CellTypes
|
|||
return RTLIL::PortDir(is_input + is_output * 2);
|
||||
}
|
||||
|
||||
bool cell_evaluable(RTLIL::IdString type) const
|
||||
bool cell_evaluable(TwineRef type) const
|
||||
{
|
||||
auto it = cell_types.find(type);
|
||||
return it != cell_types.end() && it->second.is_evaluable;
|
||||
|
|
@ -350,20 +350,20 @@ struct CellTypes
|
|||
}
|
||||
|
||||
// Consider using the ConstEval struct instead if you need named ports and/or multiple outputs
|
||||
static RTLIL::Const eval(RTLIL::IdString type, const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len, bool *errp = nullptr)
|
||||
static RTLIL::Const eval(TwineRef type, const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool signed1, bool signed2, int result_len, bool *errp = nullptr)
|
||||
{
|
||||
if (type == ID($sshr) && !signed1)
|
||||
type = ID($shr);
|
||||
if (type == ID($sshl) && !signed1)
|
||||
type = ID($shl);
|
||||
if (type == TW($sshr) && !signed1)
|
||||
type = TW($shr);
|
||||
if (type == TW($sshl) && !signed1)
|
||||
type = TW($shl);
|
||||
|
||||
if (type != ID($sshr) && type != ID($sshl) && type != ID($shr) && type != ID($shl) && type != ID($shift) && type != ID($shiftx) &&
|
||||
type != ID($pos) && type != ID($buf) && type != ID($neg) && type != ID($not)) {
|
||||
if (type != TW($sshr) && type != TW($sshl) && type != TW($shr) && type != TW($shl) && type != TW($shift) && type != TW($shiftx) &&
|
||||
type != TW($pos) && type != TW($buf) && type != TW($neg) && type != TW($not)) {
|
||||
if (!signed1 || !signed2)
|
||||
signed1 = false, signed2 = false;
|
||||
}
|
||||
|
||||
#define HANDLE_CELL_TYPE(_t) if (type == ID($##_t)) return const_ ## _t(arg1, arg2, signed1, signed2, result_len);
|
||||
#define HANDLE_CELL_TYPE(_t) if (type == TW($##_t)) return const_ ## _t(arg1, arg2, signed1, signed2, result_len);
|
||||
HANDLE_CELL_TYPE(not)
|
||||
HANDLE_CELL_TYPE(and)
|
||||
HANDLE_CELL_TYPE(or)
|
||||
|
|
@ -403,25 +403,25 @@ struct CellTypes
|
|||
HANDLE_CELL_TYPE(neg)
|
||||
#undef HANDLE_CELL_TYPE
|
||||
|
||||
if (type.in(ID($_BUF_), ID($buf)))
|
||||
if (type.in(TW($_BUF_), TW($buf)))
|
||||
return arg1;
|
||||
if (type == ID($_NOT_))
|
||||
if (type == TW($_NOT_))
|
||||
return eval_not(arg1);
|
||||
if (type == ID($_AND_))
|
||||
if (type == TW($_AND_))
|
||||
return const_and(arg1, arg2, false, false, 1);
|
||||
if (type == ID($_NAND_))
|
||||
if (type == TW($_NAND_))
|
||||
return eval_not(const_and(arg1, arg2, false, false, 1));
|
||||
if (type == ID($_OR_))
|
||||
if (type == TW($_OR_))
|
||||
return const_or(arg1, arg2, false, false, 1);
|
||||
if (type == ID($_NOR_))
|
||||
if (type == TW($_NOR_))
|
||||
return eval_not(const_or(arg1, arg2, false, false, 1));
|
||||
if (type == ID($_XOR_))
|
||||
if (type == TW($_XOR_))
|
||||
return const_xor(arg1, arg2, false, false, 1);
|
||||
if (type == ID($_XNOR_))
|
||||
if (type == TW($_XNOR_))
|
||||
return const_xnor(arg1, arg2, false, false, 1);
|
||||
if (type == ID($_ANDNOT_))
|
||||
if (type == TW($_ANDNOT_))
|
||||
return const_and(arg1, eval_not(arg2), false, false, 1);
|
||||
if (type == ID($_ORNOT_))
|
||||
if (type == TW($_ORNOT_))
|
||||
return const_or(arg1, eval_not(arg2), false, false, 1);
|
||||
|
||||
if (errp != nullptr) {
|
||||
|
|
@ -435,34 +435,34 @@ struct CellTypes
|
|||
// Consider using the ConstEval struct instead if you need named ports and/or multiple outputs
|
||||
static RTLIL::Const eval(RTLIL::Cell *cell, const RTLIL::Const &arg1, const RTLIL::Const &arg2, bool *errp = nullptr)
|
||||
{
|
||||
if (cell->type == ID($slice)) {
|
||||
if (cell->type == TW($slice)) {
|
||||
int width = cell->parameters.at(ID::Y_WIDTH).as_int();
|
||||
int offset = cell->parameters.at(ID::OFFSET).as_int();
|
||||
return arg1.extract(offset, width);
|
||||
}
|
||||
|
||||
if (cell->type == ID($concat)) {
|
||||
if (cell->type == TW($concat)) {
|
||||
RTLIL::Const ret = arg1;
|
||||
ret.append(arg2);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (cell->type == ID($bmux))
|
||||
if (cell->type == TW($bmux))
|
||||
{
|
||||
return const_bmux(arg1, arg2);
|
||||
}
|
||||
|
||||
if (cell->type == ID($demux))
|
||||
if (cell->type == TW($demux))
|
||||
{
|
||||
return const_demux(arg1, arg2);
|
||||
}
|
||||
|
||||
if (cell->type == ID($bweqx))
|
||||
if (cell->type == TW($bweqx))
|
||||
{
|
||||
return const_bweqx(arg1, arg2);
|
||||
}
|
||||
|
||||
if (cell->type == ID($lut))
|
||||
if (cell->type == TW($lut))
|
||||
{
|
||||
int width = cell->parameters.at(ID::WIDTH).as_int();
|
||||
|
||||
|
|
@ -474,7 +474,7 @@ struct CellTypes
|
|||
return const_bmux(t, arg1);
|
||||
}
|
||||
|
||||
if (cell->type == ID($sop))
|
||||
if (cell->type == TW($sop))
|
||||
{
|
||||
int width = cell->parameters.at(ID::WIDTH).as_int();
|
||||
int depth = cell->parameters.at(ID::DEPTH).as_int();
|
||||
|
|
@ -515,23 +515,23 @@ struct CellTypes
|
|||
bool signed_a = cell->parameters.count(ID::A_SIGNED) > 0 && cell->parameters[ID::A_SIGNED].as_bool();
|
||||
bool signed_b = cell->parameters.count(ID::B_SIGNED) > 0 && cell->parameters[ID::B_SIGNED].as_bool();
|
||||
int result_len = cell->parameters.count(ID::Y_WIDTH) > 0 ? cell->parameters[ID::Y_WIDTH].as_int() : -1;
|
||||
return eval(cell->type, arg1, arg2, signed_a, signed_b, result_len, errp);
|
||||
return eval(cell->type_impl, arg1, arg2, signed_a, signed_b, result_len, errp);
|
||||
}
|
||||
|
||||
// Consider using the ConstEval struct instead if you need named ports and/or multiple outputs
|
||||
static RTLIL::Const eval(RTLIL::Cell *cell, const RTLIL::Const &arg1, const RTLIL::Const &arg2, const RTLIL::Const &arg3, bool *errp = nullptr)
|
||||
{
|
||||
if (cell->type.in(ID($mux), ID($_MUX_)))
|
||||
if (cell->type.in(TW($mux), TW($_MUX_)))
|
||||
return const_mux(arg1, arg2, arg3);
|
||||
if (cell->type == ID($_NMUX_))
|
||||
if (cell->type == TW($_NMUX_))
|
||||
return eval_not(const_mux(arg1, arg2, arg3));
|
||||
if (cell->type == ID($bwmux))
|
||||
if (cell->type == TW($bwmux))
|
||||
return const_bwmux(arg1, arg2, arg3);
|
||||
if (cell->type == ID($pmux))
|
||||
if (cell->type == TW($pmux))
|
||||
return const_pmux(arg1, arg2, arg3);
|
||||
if (cell->type == ID($_AOI3_))
|
||||
if (cell->type == TW($_AOI3_))
|
||||
return eval_not(const_or(const_and(arg1, arg2, false, false, 1), arg3, false, false, 1));
|
||||
if (cell->type == ID($_OAI3_))
|
||||
if (cell->type == TW($_OAI3_))
|
||||
return eval_not(const_and(const_or(arg1, arg2, false, false, 1), arg3, false, false, 1));
|
||||
|
||||
log_assert(arg3.size() == 0);
|
||||
|
|
@ -541,9 +541,9 @@ struct CellTypes
|
|||
// Consider using the ConstEval struct instead if you need named ports and/or multiple outputs
|
||||
static RTLIL::Const eval(RTLIL::Cell *cell, const RTLIL::Const &arg1, const RTLIL::Const &arg2, const RTLIL::Const &arg3, const RTLIL::Const &arg4, bool *errp = nullptr)
|
||||
{
|
||||
if (cell->type == ID($_AOI4_))
|
||||
if (cell->type == TW($_AOI4_))
|
||||
return eval_not(const_or(const_and(arg1, arg2, false, false, 1), const_and(arg3, arg4, false, false, 1), false, false, 1));
|
||||
if (cell->type == ID($_OAI4_))
|
||||
if (cell->type == TW($_OAI4_))
|
||||
return eval_not(const_and(const_or(arg1, arg2, false, false, 1), const_or(arg3, arg4, false, false, 1), false, false, 1));
|
||||
|
||||
log_assert(arg4.size() == 0);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue