From af810b3449c9dd6727820164976dcf884074cbd1 Mon Sep 17 00:00:00 2001 From: Dhaval Chaudhari Date: Sun, 4 Jan 2026 12:06:23 +0530 Subject: [PATCH] verific: add option to disable splitting of complex ports --- frontends/verific/verific.cc | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 5790e92f0..283dafa27 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -109,6 +109,7 @@ int verific_verbose; bool verific_import_pending; string verific_error_msg; int verific_sva_fsm_limit; +bool verific_no_split_complex_ports = false; // disable splitting of complex ports #ifdef VERIFIC_SYSTEMVERILOG_SUPPORT vector verific_incdirs, verific_libdirs, verific_libexts; @@ -3061,8 +3062,9 @@ std::string verific_import(Design *design, const std::mapChangePortBusStructures(1 /* hierarchical */); + if (!verific_no_split_complex_ports) + for (auto nl : nl_todo) + nl.second->ChangePortBusStructures(1 /* hierarchical */); VerificExtNets worker; for (auto nl : nl_todo) @@ -3693,6 +3695,10 @@ struct VerificPass : public Pass { } #ifdef VERIFIC_SYSTEMVERILOG_SUPPORT + if (GetSize(args) > argidx && args[argidx] == "-no_split_complex_ports") { + verific_no_split_complex_ports = true; + goto check_error; + } if (GetSize(args) > argidx && (args[argidx] == "-f" || args[argidx] == "-F")) { unsigned verilog_mode = veri_file::UNDEFINED;