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use ADDSUB ALU mode to remove inverters

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This commit is contained in:
Pepijn de Vos 2019-10-21 12:00:27 +02:00
parent 69fb3b8db2
commit af7bdd598e
2 changed files with 77 additions and 7 deletions
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6
techlibs/gowin/arith_map.v
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@ -40,15 +40,15 @@ module _80_gw1n_alu(A, B, CI, BI, X, Y, CO);
\$pos #(.A_SIGNED(B_SIGNED), .A_WIDTH(B_WIDTH), .Y_WIDTH(Y_WIDTH)) B_conv (.A(B), .Y(B_buf));
wire [Y_WIDTH-1:0] AA = A_buf;
wire [Y_WIDTH-1:0] BB = BI ? ~B_buf : B_buf;
wire [Y_WIDTH-1:0] BB = B_buf;
wire [Y_WIDTH-1:0] C = {CO, CI};
genvar i;
generate for (i = 0; i < Y_WIDTH; i = i + 1) begin:slice
ALU #(.ALU_MODE(0))
ALU #(.ALU_MODE(2)) // ADDSUB I3 ? add : sub
alu(.I0(AA[i]),
.I1(BB[i]),
.I3(1'b0),
.I3(~BI),
.CIN(C[i]),
.COUT(CO[i]),
.SUM(Y[i])