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Added $lcu cell type
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parent
48b00dccea
commit
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8 changed files with 142 additions and 76 deletions
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@ -1012,6 +1012,38 @@ struct SatGen
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return true;
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}
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if (cell->type == "$lcu")
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{
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std::vector<int> p = importDefSigSpec(cell->getPort("\\P"), timestep);
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std::vector<int> g = importDefSigSpec(cell->getPort("\\G"), timestep);
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std::vector<int> ci = importDefSigSpec(cell->getPort("\\CI"), timestep);
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std::vector<int> co = importDefSigSpec(cell->getPort("\\CO"), timestep);
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std::vector<int> yy = model_undef ? ez->vec_var(co.size()) : co;
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for (int i = 0; i < SIZE(co); i++)
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ez->SET(yy[i], ez->OR(g[i], ez->AND(p[i], i ? yy[i-1] : ci[0])));
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if (model_undef)
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{
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std::vector<int> undef_p = importUndefSigSpec(cell->getPort("\\P"), timestep);
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std::vector<int> undef_g = importUndefSigSpec(cell->getPort("\\G"), timestep);
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std::vector<int> undef_ci = importUndefSigSpec(cell->getPort("\\CI"), timestep);
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std::vector<int> undef_co = importUndefSigSpec(cell->getPort("\\CO"), timestep);
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int undef_any_p = ez->expression(ezSAT::OpOr, undef_p);
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int undef_any_g = ez->expression(ezSAT::OpOr, undef_g);
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int undef_any_ci = ez->expression(ezSAT::OpOr, undef_ci);
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int undef_co_bit = ez->OR(undef_any_p, undef_any_g, undef_any_ci);
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std::vector<int> undef_co_bits(undef_co.size(), undef_co_bit);
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ez->assume(ez->vec_eq(undef_co_bits, undef_co));
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undefGating(co, yy, undef_co);
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}
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return true;
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}
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if (cell->type == "$alu")
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{
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std::vector<int> a = importDefSigSpec(cell->getPort("\\A"), timestep);
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