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Add force_downto and force_upto wire attributes.

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Fixes #2058.
This commit is contained in:
Marcelina Kościelnicka 2020-05-18 18:15:03 +02:00
parent 2d573a0ff6
commit aee439360b
43 changed files with 258 additions and 27 deletions
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2
techlibs/greenpak4/cells_map.v
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@ -115,6 +115,7 @@ module \$lut (A, Y);
parameter WIDTH = 0;
parameter LUT = 0;
(* force_downto *)
input [WIDTH-1:0] A;
output Y;
@ -150,6 +151,7 @@ module \$__COUNT_ (CE, CLK, OUT, POUT, RST, UP);
input wire CE;
input wire CLK;
output reg OUT;
(* force_downto *)
output reg[WIDTH-1:0] POUT;
input wire RST;
input wire UP;