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This commit is contained in:
Eddie Hung 2019-04-21 14:16:59 -07:00
parent d99422411f
commit ae95aba60a
1 changed files with 7 additions and 0 deletions
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7
techlibs/xilinx/synth_xilinx.cc
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@ -269,8 +269,15 @@ struct SynthXilinxPass : public Pass
Pass::call(design, "dff2dffe");
if (!nosrl) {
// shregmap operates on bit-level flops, not word-level,
// so break those down here
Pass::call(design, "simplemap t:$dff t:$dffe");
// shregmap -tech xilinx can cope with $shiftx and $mux
// cells for identifiying variable-length shift registers,
// so attempt to convert $pmux-es to the former
Pass::call(design, "pmux2shiftx");
// pmux2shiftx can leave behind a $pmux with a single entry
// -- need this to clean that up
Pass::call(design, "opt_expr -mux_undef");
Pass::call(design, "shregmap -tech xilinx -minlen 3");
}