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Add pmgen slices and choices
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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parent
fe1b2337fd
commit
adb81ba386
5 changed files with 277 additions and 28 deletions
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@ -99,6 +99,24 @@ void reduce_tree(test_pmgen_pm &pm)
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log(" -> %s (%s)\n", log_id(c), log_id(c->type));
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}
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void opt_eqpmux(test_pmgen_pm &pm)
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{
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auto &st = pm.st_eqpmux;
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SigSpec Y = st.pmux->getPort(ID::Y);
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int width = GetSize(Y);
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SigSpec EQ = st.pmux->getPort(ID::B).extract(st.pmux_slice_eq*width, width);
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SigSpec NE = st.pmux->getPort(ID::B).extract(st.pmux_slice_ne*width, width);
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log("Found eqpmux circuit driving %s (eq=%s, ne=%s, pmux=%s).\n",
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log_signal(Y), log_id(st.eq), log_id(st.ne), log_id(st.pmux));
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pm.autoremove(st.pmux);
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Cell *c = pm.module->addMux(NEW_ID, NE, EQ, st.eq->getPort(ID::Y), Y);
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log(" -> %s (%s)\n", log_id(c), log_id(c->type));
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}
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#define GENERATE_PATTERN(pmclass, pattern) \
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generate_pattern<pmclass>([](pmclass &pm, std::function<void()> f){ return pm.run_ ## pattern(f); }, #pmclass, #pattern, design)
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@ -149,16 +167,17 @@ void generate_pattern(std::function<void(pm&,std::function<void()>)> run, const
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log("Generating \"%s\" patterns for pattern matcher \"%s\".\n", pattern, pmclass);
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int modcnt = 0;
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int maxmodcnt = 100;
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int maxsubcnt = 4;
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int timeout = 0;
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vector<Module*> mods;
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while (modcnt < 100)
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while (modcnt < maxmodcnt)
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{
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int submodcnt = 0, itercnt = 0, cellcnt = 0;
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Module *mod = design->addModule(NEW_ID);
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while (modcnt < 100 && submodcnt < maxsubcnt && itercnt++ < 1000)
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while (modcnt < maxmodcnt && submodcnt < maxsubcnt && itercnt++ < 1000)
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{
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if (timeout++ > 10000)
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log_error("pmgen generator is stuck: 10000 iterations an no matching module generated.\n");
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@ -232,6 +251,12 @@ struct TestPmgenPass : public Pass {
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log("Demo for recursive pmgen patterns. Map trees of AND/OR/XOR to $reduce_*.\n");
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log("\n");
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log("\n");
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log(" test_pmgen -eqpmux [options] [selection]\n");
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log("\n");
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log("Demo for recursive pmgen patterns. Optimize EQ/NE/PMUX circuits.\n");
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log("\n");
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log("\n");
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log(" test_pmgen -generate [options] <pattern_name>\n");
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log("\n");
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@ -277,6 +302,25 @@ struct TestPmgenPass : public Pass {
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test_pmgen_pm(module, module->selected_cells()).run_reduce(reduce_tree);
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}
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void execute_eqpmux(std::vector<std::string> args, RTLIL::Design *design)
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{
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log_header(design, "Executing TEST_PMGEN pass (-eqpmux).\n");
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size_t argidx;
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for (argidx = 2; argidx < args.size(); argidx++)
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{
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// if (args[argidx] == "-singleton") {
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// singleton_mode = true;
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// continue;
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// }
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break;
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}
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extra_args(args, argidx, design);
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for (auto module : design->selected_modules())
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test_pmgen_pm(module, module->selected_cells()).run_eqpmux(opt_eqpmux);
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}
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void execute_generate(std::vector<std::string> args, RTLIL::Design *design)
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{
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log_header(design, "Executing TEST_PMGEN pass (-generate).\n");
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@ -299,6 +343,9 @@ struct TestPmgenPass : public Pass {
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if (pattern == "reduce")
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return GENERATE_PATTERN(test_pmgen_pm, reduce);
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if (pattern == "eqpmux")
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return GENERATE_PATTERN(test_pmgen_pm, eqpmux);
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if (pattern == "ice40_dsp")
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return GENERATE_PATTERN(ice40_dsp_pm, ice40_dsp);
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@ -319,6 +366,8 @@ struct TestPmgenPass : public Pass {
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return execute_reduce_chain(args, design);
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if (args[1] == "-reduce_tree")
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return execute_reduce_tree(args, design);
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if (args[1] == "-eqpmux")
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return execute_eqpmux(args, design);
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if (args[1] == "-generate")
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return execute_generate(args, design);
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}
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