3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-11 05:30:53 +00:00

add PolarFire FPGA support

This commit is contained in:
Chun Lin Min 2024-07-02 12:44:30 -07:00
parent a739e21a5f
commit acddc36389
59 changed files with 5389 additions and 0 deletions

View file

@ -0,0 +1,21 @@
# ISC License
#
# Copyright (C) 2024 Microchip Technology Inc. and its subsidiaries
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
read_verilog widemux.v
synth_mchp -top widemux -abc9 -family pf -noiopad
write_verilog -noexpr widemux.vm