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ice40: Fix SPRAM model to keep data stable if chipselect is low

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According to the official simulation model, and also cross-checked
on real hardware, the data output of the SPRAM when chipselect is
low is kept stable. It doesn't go undefined.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This commit is contained in:
Sylvain Munaut 2020-03-14 21:01:42 +01:00
parent acb341745d
commit acd9eeef7c
1 changed files with 8 additions and 5 deletions
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13
techlibs/ice40/cells_sim.v
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@ -2350,16 +2350,19 @@ module SB_SPRAM256KA (
if (off) begin if (off) begin
DATAOUT <= 0; DATAOUT <= 0;
end else end else
if (CHIPSELECT && !STANDBY && !WREN) begin if (STANDBY) begin
DATAOUT <= mem[ADDRESS]; DATAOUT <= 'bx;
end else begin end else
if (CHIPSELECT && !STANDBY && WREN) begin if (CHIPSELECT) begin
if (!WREN) begin
DATAOUT <= mem[ADDRESS];
end else begin
if (MASKWREN[0]) mem[ADDRESS][ 3: 0] = DATAIN[ 3: 0]; if (MASKWREN[0]) mem[ADDRESS][ 3: 0] = DATAIN[ 3: 0];
if (MASKWREN[1]) mem[ADDRESS][ 7: 4] = DATAIN[ 7: 4]; if (MASKWREN[1]) mem[ADDRESS][ 7: 4] = DATAIN[ 7: 4];
if (MASKWREN[2]) mem[ADDRESS][11: 8] = DATAIN[11: 8]; if (MASKWREN[2]) mem[ADDRESS][11: 8] = DATAIN[11: 8];
if (MASKWREN[3]) mem[ADDRESS][15:12] = DATAIN[15:12]; if (MASKWREN[3]) mem[ADDRESS][15:12] = DATAIN[15:12];
DATAOUT <= 'bx;
end end
DATAOUT <= 'bx;
end end
end end
`endif `endif