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	Switch verific bindings from Symbiotic EDA flavored Verific to YosysHQ flavored Verific
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
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					 1 changed files with 18 additions and 18 deletions
				
			
		|  | @ -51,12 +51,12 @@ USING_YOSYS_NAMESPACE | ||||||
| #include "VeriLibrary.h" | #include "VeriLibrary.h" | ||||||
| #include "VeriExtensions.h" | #include "VeriExtensions.h" | ||||||
| 
 | 
 | ||||||
| #ifndef SYMBIOTIC_VERIFIC_API_VERSION | #ifndef YOSYSHQ_VERIFIC_API_VERSION | ||||||
| #  error "Only Symbiotic EDA flavored Verific is supported. Please contact office@symbioticeda.com for commercial support for Yosys+Verific." | #  error "Only YosysHQ flavored Verific is supported. Please contact office@yosyshq.com for commercial support for Yosys+Verific." | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
| #if SYMBIOTIC_VERIFIC_API_VERSION < 20201101 | #if YOSYSHQ_VERIFIC_API_VERSION < 20201201 | ||||||
| #  error "Please update your version of Symbiotic EDA flavored Verific." | #  error "Please update your version of YosysHQ flavored Verific." | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
| #ifdef __clang__ | #ifdef __clang__ | ||||||
|  | @ -1471,7 +1471,7 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::se | ||||||
| 				continue; | 				continue; | ||||||
| 		} | 		} | ||||||
| 
 | 
 | ||||||
| 		if (inst->Type() == PRIM_SEDA_INITSTATE) | 		if (inst->Type() == PRIM_YOSYSHQ_INITSTATE) | ||||||
| 		{ | 		{ | ||||||
| 			SigBit initstate = module->Initstate(new_verific_id(inst)); | 			SigBit initstate = module->Initstate(new_verific_id(inst)); | ||||||
| 			SigBit sig_o = net_map_at(inst->GetOutput()); | 			SigBit sig_o = net_map_at(inst->GetOutput()); | ||||||
|  | @ -2199,7 +2199,7 @@ struct VerificPass : public Pass { | ||||||
| 		log("\n"); | 		log("\n"); | ||||||
| 		log("    verific -app <application>..\n"); | 		log("    verific -app <application>..\n"); | ||||||
| 		log("\n"); | 		log("\n"); | ||||||
| 		log("Execute SEDA formal application on loaded Verilog files.\n"); | 		log("Execute YosysHQ formal application on loaded Verilog files.\n"); | ||||||
| 		log("\n"); | 		log("\n"); | ||||||
| 		log("Application options:\n"); | 		log("Application options:\n"); | ||||||
| 		log("\n"); | 		log("\n"); | ||||||
|  | @ -2250,11 +2250,11 @@ struct VerificPass : public Pass { | ||||||
| 		log("  WARNING: Templates only available in commercial build.\n"); | 		log("  WARNING: Templates only available in commercial build.\n"); | ||||||
| 		log("\n"); | 		log("\n"); | ||||||
| #endif | #endif | ||||||
| 		log("Use Symbiotic EDA Suite if you need Yosys+Verifc.\n"); | 		log("Use YosysHQ Tabby CAD Suite if you need Yosys+Verific.\n"); | ||||||
| 		log("https://www.symbioticeda.com/seda-suite\n"); | 		log("https://www.yosyshq.com/\n"); | ||||||
| 		log("\n"); | 		log("\n"); | ||||||
| 		log("Contact office@symbioticeda.com for free evaluation\n"); | 		log("Contact office@yosyshq.com for free evaluation\n"); | ||||||
| 		log("binaries of Symbiotic EDA Suite.\n"); | 		log("binaries of YosysHQ Tabby CAD Suite.\n"); | ||||||
| 		log("\n"); | 		log("\n"); | ||||||
| 	} | 	} | ||||||
| #ifdef YOSYS_ENABLE_VERIFIC | #ifdef YOSYS_ENABLE_VERIFIC | ||||||
|  | @ -2265,11 +2265,11 @@ struct VerificPass : public Pass { | ||||||
| 		if (check_noverific_env()) | 		if (check_noverific_env()) | ||||||
| 			log_cmd_error("This version of Yosys is built without Verific support.\n" | 			log_cmd_error("This version of Yosys is built without Verific support.\n" | ||||||
| 					"\n" | 					"\n" | ||||||
| 					"Use Symbiotic EDA Suite if you need Yosys+Verifc.\n" | 					"Use YosysHQ Tabby CAD Suite if you need Yosys+Verific.\n" | ||||||
| 					"https://www.symbioticeda.com/seda-suite\n" | 					"https://www.yosyshq.com/\n" | ||||||
| 					"\n" | 					"\n" | ||||||
| 					"Contact office@symbioticeda.com for free evaluation\n" | 					"Contact office@yosyshq.com for free evaluation\n" | ||||||
| 					"binaries of Symbiotic EDA Suite.\n"); | 					"binaries of YosysHQ Tabby CAD Suite.\n"); | ||||||
| 
 | 
 | ||||||
| 		log_header(design, "Executing VERIFIC (loading SystemVerilog and VHDL designs using Verific).\n"); | 		log_header(design, "Executing VERIFIC (loading SystemVerilog and VHDL designs using Verific).\n"); | ||||||
| 
 | 
 | ||||||
|  | @ -2926,11 +2926,11 @@ struct VerificPass : public Pass { | ||||||
| 	void execute(std::vector<std::string>, RTLIL::Design *) override { | 	void execute(std::vector<std::string>, RTLIL::Design *) override { | ||||||
| 		log_cmd_error("This version of Yosys is built without Verific support.\n" | 		log_cmd_error("This version of Yosys is built without Verific support.\n" | ||||||
| 				"\n" | 				"\n" | ||||||
| 				"Use Symbiotic EDA Suite if you need Yosys+Verifc.\n" | 				"Use YosysHQ Tabby CAD Suite if you need Yosys+Verific.\n" | ||||||
| 				"https://www.symbioticeda.com/seda-suite\n" | 				"https://www.yosyshq.com/\n" | ||||||
| 				"\n" | 				"\n" | ||||||
| 				"Contact office@symbioticeda.com for free evaluation\n" | 				"Contact office@yosyshq.com for free evaluation\n" | ||||||
| 				"binaries of Symbiotic EDA Suite.\n"); | 				"binaries of YosysHQ Tabby CAD Suite.\n"); | ||||||
| 	} | 	} | ||||||
| #endif | #endif | ||||||
| } VerificPass; | } VerificPass; | ||||||
|  |  | ||||||
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