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	Call abc9 with "&write -n", and parse_xaiger() to cope
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					 2 changed files with 88 additions and 95 deletions
				
			
		|  | @ -376,105 +376,98 @@ void AigerReader::parse_xaiger(const dict<int,IdString> &box_lookup) | ||||||
| 	if (n0) | 	if (n0) | ||||||
| 		module->connect(n0, State::S0); | 		module->connect(n0, State::S0); | ||||||
| 
 | 
 | ||||||
|  | 	int c = f.get(); | ||||||
|  | 	if (c != 'c') | ||||||
|  | 		log_error("Line %u: cannot interpret first character '%c'!\n", line_count, c); | ||||||
|  | 	c = f.get(); | ||||||
|  | 	log_assert(c == '\n'); | ||||||
|  | 
 | ||||||
| 	// Parse footer (symbol table, comments, etc.)
 | 	// Parse footer (symbol table, comments, etc.)
 | ||||||
| 	std::string s; | 	std::string s; | ||||||
| 	bool comment_seen = false; | 	for (int c = f.get(); c != EOF; c = f.get()) { | ||||||
| 	for (int c = f.peek(); c != EOF; c = f.peek()) { | 		// XAIGER extensions
 | ||||||
| 		if (comment_seen || c == 'c') { | 		if (c == 'm') { | ||||||
| 			if (!comment_seen) { | 			uint32_t dataSize YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); | ||||||
| 				f.ignore(1); | 			uint32_t lutNum = parse_xaiger_literal(f); | ||||||
| 				c = f.peek(); | 			uint32_t lutSize YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); | ||||||
| 				comment_seen = true; | 			log_debug("m: dataSize=%u lutNum=%u lutSize=%u\n", dataSize, lutNum, lutSize); | ||||||
| 			} | 			ConstEvalAig ce(module); | ||||||
| 			if (c == '\n') | 			for (unsigned i = 0; i < lutNum; ++i) { | ||||||
| 				break; | 				uint32_t rootNodeID = parse_xaiger_literal(f); | ||||||
| 			f.ignore(1); | 				uint32_t cutLeavesM = parse_xaiger_literal(f); | ||||||
| 			// XAIGER extensions
 | 				log_debug2("rootNodeID=%d cutLeavesM=%d\n", rootNodeID, cutLeavesM); | ||||||
| 			if (c == 'm') { | 				RTLIL::Wire *output_sig = module->wire(stringf("\\__%d__", rootNodeID)); | ||||||
| 				uint32_t dataSize YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); | 				uint32_t nodeID; | ||||||
| 				uint32_t lutNum = parse_xaiger_literal(f); | 				RTLIL::SigSpec input_sig; | ||||||
| 				uint32_t lutSize YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); | 				for (unsigned j = 0; j < cutLeavesM; ++j) { | ||||||
| 				log_debug("m: dataSize=%u lutNum=%u lutSize=%u\n", dataSize, lutNum, lutSize); | 					nodeID = parse_xaiger_literal(f); | ||||||
| 				ConstEvalAig ce(module); | 					log_debug2("\t%u\n", nodeID); | ||||||
| 				for (unsigned i = 0; i < lutNum; ++i) { | 					RTLIL::Wire *wire = module->wire(stringf("\\__%d__", nodeID)); | ||||||
| 					uint32_t rootNodeID = parse_xaiger_literal(f); | 					log_assert(wire); | ||||||
| 					uint32_t cutLeavesM = parse_xaiger_literal(f); | 					input_sig.append(wire); | ||||||
| 					log_debug2("rootNodeID=%d cutLeavesM=%d\n", rootNodeID, cutLeavesM); |  | ||||||
| 					RTLIL::Wire *output_sig = module->wire(stringf("\\__%d__", rootNodeID)); |  | ||||||
| 					uint32_t nodeID; |  | ||||||
| 					RTLIL::SigSpec input_sig; |  | ||||||
| 					for (unsigned j = 0; j < cutLeavesM; ++j) { |  | ||||||
| 						nodeID = parse_xaiger_literal(f); |  | ||||||
| 						log_debug2("\t%u\n", nodeID); |  | ||||||
| 						RTLIL::Wire *wire = module->wire(stringf("\\__%d__", nodeID)); |  | ||||||
| 						log_assert(wire); |  | ||||||
| 						input_sig.append(wire); |  | ||||||
| 					} |  | ||||||
| 					// TODO: Compute LUT mask from AIG in less than O(2 ** input_sig.size())
 |  | ||||||
| 					ce.clear(); |  | ||||||
| 					ce.compute_deps(output_sig, input_sig.to_sigbit_pool()); |  | ||||||
| 					RTLIL::Const lut_mask(RTLIL::State::Sx, 1 << input_sig.size()); |  | ||||||
| 					for (int j = 0; j < (1 << cutLeavesM); ++j) { |  | ||||||
| 						int gray = j ^ (j >> 1); |  | ||||||
| 						ce.set_incremental(input_sig, RTLIL::Const{gray, static_cast<int>(cutLeavesM)}); |  | ||||||
| 						RTLIL::SigBit o(output_sig); |  | ||||||
| 						bool success YS_ATTRIBUTE(unused) = ce.eval(o); |  | ||||||
| 						log_assert(success); |  | ||||||
| 						log_assert(o.wire == nullptr); |  | ||||||
| 						lut_mask[gray] = o.data; |  | ||||||
| 					} |  | ||||||
| 					RTLIL::Cell *output_cell = module->cell(stringf("\\__%d__$and", rootNodeID)); |  | ||||||
| 					log_assert(output_cell); |  | ||||||
| 					module->remove(output_cell); |  | ||||||
| 					module->addLut(stringf("\\__%d__$lut", rootNodeID), input_sig, output_sig, std::move(lut_mask)); |  | ||||||
| 				} | 				} | ||||||
| 			} | 				// TODO: Compute LUT mask from AIG in less than O(2 ** input_sig.size())
 | ||||||
| 			else if (c == 'r') { | 				ce.clear(); | ||||||
| 				uint32_t dataSize YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); | 				ce.compute_deps(output_sig, input_sig.to_sigbit_pool()); | ||||||
| 				flopNum = parse_xaiger_literal(f); | 				RTLIL::Const lut_mask(RTLIL::State::Sx, 1 << input_sig.size()); | ||||||
| 				log_debug("flopNum = %u\n", flopNum); | 				for (int j = 0; j < (1 << cutLeavesM); ++j) { | ||||||
| 				log_assert(dataSize == (flopNum+1) * sizeof(uint32_t)); | 					int gray = j ^ (j >> 1); | ||||||
| 				f.ignore(flopNum * sizeof(uint32_t)); | 					ce.set_incremental(input_sig, RTLIL::Const{gray, static_cast<int>(cutLeavesM)}); | ||||||
| 			} | 					RTLIL::SigBit o(output_sig); | ||||||
| 			else if (c == 'n') { | 					bool success YS_ATTRIBUTE(unused) = ce.eval(o); | ||||||
| 				parse_xaiger_literal(f); | 					log_assert(success); | ||||||
| 				f >> s; | 					log_assert(o.wire == nullptr); | ||||||
| 				log_debug("n: '%s'\n", s.c_str()); | 					lut_mask[gray] = o.data; | ||||||
| 			} |  | ||||||
| 			else if (c == 'h') { |  | ||||||
| 				f.ignore(sizeof(uint32_t)); |  | ||||||
| 				uint32_t version YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); |  | ||||||
| 				log_assert(version == 1); |  | ||||||
| 				uint32_t ciNum YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); |  | ||||||
| 				log_debug("ciNum = %u\n", ciNum); |  | ||||||
| 				uint32_t coNum YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); |  | ||||||
| 				log_debug("coNum = %u\n", coNum); |  | ||||||
| 				piNum = parse_xaiger_literal(f); |  | ||||||
| 				log_debug("piNum = %u\n", piNum); |  | ||||||
| 				uint32_t poNum YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); |  | ||||||
| 				log_debug("poNum = %u\n", poNum); |  | ||||||
| 				uint32_t boxNum = parse_xaiger_literal(f); |  | ||||||
| 				log_debug("boxNum = %u\n", boxNum); |  | ||||||
| 				for (unsigned i = 0; i < boxNum; i++) { |  | ||||||
| 					f.ignore(2*sizeof(uint32_t)); |  | ||||||
| 					uint32_t boxUniqueId = parse_xaiger_literal(f); |  | ||||||
| 					log_assert(boxUniqueId > 0); |  | ||||||
| 					uint32_t oldBoxNum = parse_xaiger_literal(f); |  | ||||||
| 					RTLIL::Cell* cell = module->addCell(stringf("$__box%u__", oldBoxNum), box_lookup.at(boxUniqueId)); |  | ||||||
| 					boxes.emplace_back(cell); |  | ||||||
| 				} | 				} | ||||||
| 			} | 				RTLIL::Cell *output_cell = module->cell(stringf("\\__%d__$and", rootNodeID)); | ||||||
| 			else if (c == 'a' || c == 'i' || c == 'o' || c == 's') { | 				log_assert(output_cell); | ||||||
| 				uint32_t dataSize = parse_xaiger_literal(f); | 				module->remove(output_cell); | ||||||
| 				f.ignore(dataSize); | 				module->addLut(stringf("\\__%d__$lut", rootNodeID), input_sig, output_sig, std::move(lut_mask)); | ||||||
| 				log_debug("ignoring '%c'\n", c); |  | ||||||
| 			} |  | ||||||
| 			else { |  | ||||||
| 				break; |  | ||||||
| 			} | 			} | ||||||
| 		} | 		} | ||||||
| 		else | 		else if (c == 'r') { | ||||||
| 			log_error("Line %u: cannot interpret first character '%c'!\n", line_count, c); | 			uint32_t dataSize YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); | ||||||
|  | 			flopNum = parse_xaiger_literal(f); | ||||||
|  | 			log_debug("flopNum = %u\n", flopNum); | ||||||
|  | 			log_assert(dataSize == (flopNum+1) * sizeof(uint32_t)); | ||||||
|  | 			f.ignore(flopNum * sizeof(uint32_t)); | ||||||
|  | 		} | ||||||
|  | 		else if (c == 'n') { | ||||||
|  | 			parse_xaiger_literal(f); | ||||||
|  | 			f >> s; | ||||||
|  | 			log_debug("n: '%s'\n", s.c_str()); | ||||||
|  | 		} | ||||||
|  | 		else if (c == 'h') { | ||||||
|  | 			f.ignore(sizeof(uint32_t)); | ||||||
|  | 			uint32_t version YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); | ||||||
|  | 			log_assert(version == 1); | ||||||
|  | 			uint32_t ciNum YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); | ||||||
|  | 			log_debug("ciNum = %u\n", ciNum); | ||||||
|  | 			uint32_t coNum YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); | ||||||
|  | 			log_debug("coNum = %u\n", coNum); | ||||||
|  | 			piNum = parse_xaiger_literal(f); | ||||||
|  | 			log_debug("piNum = %u\n", piNum); | ||||||
|  | 			uint32_t poNum YS_ATTRIBUTE(unused) = parse_xaiger_literal(f); | ||||||
|  | 			log_debug("poNum = %u\n", poNum); | ||||||
|  | 			uint32_t boxNum = parse_xaiger_literal(f); | ||||||
|  | 			log_debug("boxNum = %u\n", boxNum); | ||||||
|  | 			for (unsigned i = 0; i < boxNum; i++) { | ||||||
|  | 				f.ignore(2*sizeof(uint32_t)); | ||||||
|  | 				uint32_t boxUniqueId = parse_xaiger_literal(f); | ||||||
|  | 				log_assert(boxUniqueId > 0); | ||||||
|  | 				uint32_t oldBoxNum = parse_xaiger_literal(f); | ||||||
|  | 				RTLIL::Cell* cell = module->addCell(stringf("$__box%u__", oldBoxNum), box_lookup.at(boxUniqueId)); | ||||||
|  | 				boxes.emplace_back(cell); | ||||||
|  | 			} | ||||||
|  | 		} | ||||||
|  | 		else if (c == 'a' || c == 'i' || c == 'o' || c == 's') { | ||||||
|  | 			uint32_t dataSize = parse_xaiger_literal(f); | ||||||
|  | 			f.ignore(dataSize); | ||||||
|  | 			log_debug("ignoring '%c'\n", c); | ||||||
|  | 		} | ||||||
|  | 		else { | ||||||
|  | 			break; | ||||||
|  | 		} | ||||||
| 	} | 	} | ||||||
| 
 | 
 | ||||||
| 	post_process(); | 	post_process(); | ||||||
|  |  | ||||||
|  | @ -30,7 +30,7 @@ | ||||||
| 						"&st; &if -g -K 6; &synch2; &if {W} -v; &save; &load; "\ | 						"&st; &if -g -K 6; &synch2; &if {W} -v; &save; &load; "\ | ||||||
| 						"&mfs; &ps -l" | 						"&mfs; &ps -l" | ||||||
| #else | #else | ||||||
| #define ABC_COMMAND_LUT "&st; &scorr; &sweep; &dc2; &st; &dch -f; &ps; &if {W} {D} -v; &mfs; &ps -l" | #define ABC_COMMAND_LUT "&st; &scorr; &sweep; &dc2; &st; &dch -f; &ps; &if {W} {D} -v; &mfs; &ps -l; &verify -s" | ||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
| 
 | 
 | ||||||
|  | @ -311,7 +311,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *module, std::string scrip | ||||||
| 		for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) | 		for (size_t pos = abc9_script.find("&mfs"); pos != std::string::npos; pos = abc9_script.find("&mfs", pos)) | ||||||
| 			abc9_script = abc9_script.erase(pos, strlen("&mfs")); | 			abc9_script = abc9_script.erase(pos, strlen("&mfs")); | ||||||
| 
 | 
 | ||||||
| 	abc9_script += stringf("; &write %s/output.aig", tempdir_name.c_str()); | 	abc9_script += stringf("; &write -n %s/output.aig", tempdir_name.c_str()); | ||||||
| 	abc9_script = add_echos_to_abc9_cmd(abc9_script); | 	abc9_script = add_echos_to_abc9_cmd(abc9_script); | ||||||
| 
 | 
 | ||||||
| 	for (size_t i = 0; i+1 < abc9_script.size(); i++) | 	for (size_t i = 0; i+1 < abc9_script.size(); i++) | ||||||
|  |  | ||||||
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