3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-05-29 13:26:31 +00:00

Add test for non-contiguous memory init

Also negative memory addresses.
This commit is contained in:
Krystine Sherwin 2026-05-29 18:40:24 +12:00
parent aac7366862
commit ab5f25db9a
No known key found for this signature in database
2 changed files with 57 additions and 0 deletions

View file

@ -0,0 +1,44 @@
read -sv << EOT
module top;
(* nomem2reg *)
logic a1 [2:3][3:1] = '{'{0, 1, 1}, '{1, 0, 1}};
always_comb begin
assert(a1[2][3] == 0);
assert(a1[2][2] == 1);
assert(a1[2][1] == 1);
assert(a1[3][3] == 1);
assert(a1[3][2] == 0);
assert(a1[3][1] == 1);
end
(* nomem2reg *)
logic [1:0] a2 [6:5][2:4] = '{'{0, 1, 2}, '{1, 0, 3}};
always_comb begin
assert(a2[6][2] == 0);
assert(a2[6][3] == 1);
assert(a2[6][4] == 2);
assert(a2[5][2] == 1);
assert(a2[5][3] == 0);
assert(a2[5][4] == 3);
end
(* nomem2reg *)
logic [1:0] a3 [-2:-1][-1:1] = '{'{0, 1, 2}, '{1, 0, 3}};
always_comb begin
assert(a3[-2][-1] == 0);
assert(a3[-2][0] == 1);
assert(a3[-2][1] == 2);
assert(a3[-1][-1] == 1);
assert(a3[-1][0] == 0);
assert(a3[-1][1] == 3);
end
endmodule
EOT
hierarchy
proc
memory
async2sync
sat -enable_undef -verify -prove-asserts

View file

@ -0,0 +1,13 @@
module top;
(* nomem2reg *)
logic [1:0] a3 [-2:-1][-1:1] = '{'{0, 1, 2}, '{1, 0, 3}};
always_comb begin
assert(a3[-2][-1] == 0);
assert(a3[-2][0] == 1);
assert(a3[-2][1] == 2);
assert(a3[-1][-1] == 1);
assert(a3[-1][0] == 0);
assert(a3[-1][1] == 3);
end
endmodule