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Add test for non-contiguous memory init
Also negative memory addresses.
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44
tests/check_mem/init_correct.ys
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44
tests/check_mem/init_correct.ys
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@ -0,0 +1,44 @@
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read -sv << EOT
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module top;
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(* nomem2reg *)
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logic a1 [2:3][3:1] = '{'{0, 1, 1}, '{1, 0, 1}};
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always_comb begin
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assert(a1[2][3] == 0);
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assert(a1[2][2] == 1);
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assert(a1[2][1] == 1);
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assert(a1[3][3] == 1);
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assert(a1[3][2] == 0);
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assert(a1[3][1] == 1);
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end
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(* nomem2reg *)
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logic [1:0] a2 [6:5][2:4] = '{'{0, 1, 2}, '{1, 0, 3}};
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always_comb begin
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assert(a2[6][2] == 0);
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assert(a2[6][3] == 1);
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assert(a2[6][4] == 2);
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assert(a2[5][2] == 1);
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assert(a2[5][3] == 0);
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assert(a2[5][4] == 3);
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end
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(* nomem2reg *)
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logic [1:0] a3 [-2:-1][-1:1] = '{'{0, 1, 2}, '{1, 0, 3}};
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always_comb begin
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assert(a3[-2][-1] == 0);
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assert(a3[-2][0] == 1);
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assert(a3[-2][1] == 2);
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assert(a3[-1][-1] == 1);
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assert(a3[-1][0] == 0);
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assert(a3[-1][1] == 3);
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end
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endmodule
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EOT
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hierarchy
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proc
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memory
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async2sync
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sat -enable_undef -verify -prove-asserts
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13
tests/check_mem/negative_idx.sv
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13
tests/check_mem/negative_idx.sv
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module top;
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(* nomem2reg *)
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logic [1:0] a3 [-2:-1][-1:1] = '{'{0, 1, 2}, '{1, 0, 3}};
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always_comb begin
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assert(a3[-2][-1] == 0);
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assert(a3[-2][0] == 1);
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assert(a3[-2][1] == 2);
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assert(a3[-1][-1] == 1);
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assert(a3[-1][0] == 0);
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assert(a3[-1][1] == 3);
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end
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endmodule
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