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Add tests for macc and rom;

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Test cases from
https://www.latticesemi.com/-/media/LatticeSemi/Documents/UserManuals/EI/iCEcube201701UserGuide.ashx?document_id=52071;
In both cases synthesized only LUTs and DFFs.
This commit is contained in:
SergeyDegtyar 2019-08-27 13:56:26 +03:00
parent c29380b381
commit aad9bad326
4 changed files with 55 additions and 0 deletions
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22
tests/ice40/macc.v Normal file
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module top(clk,a,b,c,set);
parameter A_WIDTH = 4;
parameter B_WIDTH = 3;
input set;
input clk;
input signed [(A_WIDTH - 1):0] a;
input signed [(B_WIDTH - 1):0] b;
output signed [(A_WIDTH + B_WIDTH - 1):0] c;
reg [(A_WIDTH + B_WIDTH - 1):0] reg_tmp_c;
assign c = reg_tmp_c;
always @(posedge clk)
begin
if(set)
begin
reg_tmp_c <= 0;
end
else
begin
reg_tmp_c <= a * b + c;
end
end
endmodule