mirror of
				https://github.com/YosysHQ/yosys
				synced 2025-11-04 13:29:12 +00:00 
			
		
		
		
	aiger.cc: Explicit unsorted-pool-as-LIFO
This commit is contained in:
		
							parent
							
								
									0072a267cc
								
							
						
					
					
						commit
						aac562d36a
					
				
					 1 changed files with 4 additions and 0 deletions
				
			
		| 
						 | 
				
			
			@ -153,6 +153,9 @@ struct AigerWriter
 | 
			
		|||
				sigmap.add(wire);
 | 
			
		||||
 | 
			
		||||
		// handle ports
 | 
			
		||||
		// provided the input_bits and output_bits don't get sorted they
 | 
			
		||||
		// will be returned in reverse order, so add them in reverse to
 | 
			
		||||
		// match
 | 
			
		||||
		for (auto riter = module->ports.rbegin(); riter != module->ports.rend(); ++riter) {
 | 
			
		||||
			auto *wire = module->wire(*riter);
 | 
			
		||||
			for (int i = 0; i < GetSize(wire); i++)
 | 
			
		||||
| 
						 | 
				
			
			@ -353,6 +356,7 @@ struct AigerWriter
 | 
			
		|||
		}
 | 
			
		||||
 | 
			
		||||
		init_map.sort();
 | 
			
		||||
		// we are relying here on unsorted pools iterating last-in-first-out
 | 
			
		||||
		if (!no_sort) {
 | 
			
		||||
			input_bits.sort();
 | 
			
		||||
			output_bits.sort();
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue