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aiger.cc: Explicit unsorted-pool-as-LIFO

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Krystine Sherwin 2025-05-31 09:55:00 +12:00
parent 0072a267cc
commit aac562d36a
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backends/aiger/aiger.cc
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@ -153,6 +153,9 @@ struct AigerWriter
sigmap.add(wire); sigmap.add(wire);
// handle ports // handle ports
// provided the input_bits and output_bits don't get sorted they
// will be returned in reverse order, so add them in reverse to
// match
for (auto riter = module->ports.rbegin(); riter != module->ports.rend(); ++riter) { for (auto riter = module->ports.rbegin(); riter != module->ports.rend(); ++riter) {
auto *wire = module->wire(*riter); auto *wire = module->wire(*riter);
for (int i = 0; i < GetSize(wire); i++) for (int i = 0; i < GetSize(wire); i++)
@ -353,6 +356,7 @@ struct AigerWriter
} }
init_map.sort(); init_map.sort();
// we are relying here on unsorted pools iterating last-in-first-out
if (!no_sort) { if (!no_sort) {
input_bits.sort(); input_bits.sort();
output_bits.sort(); output_bits.sort();