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manual: document $meminit cell and memory_* passes.
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@ -428,8 +428,8 @@ memory object has the following properties:
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All read accesses to the memory are transformed to {\tt \$memrd} cells and all write accesses to
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{\tt \$memwr} cells by the language frontend. These cells consist of independent read- and write-ports
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to the memory. The \B{MEMID} parameter on these cells is used to link them together and to the
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RTLIL::Memory object they belong to.
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to the memory. Memory initialization is transformed to {\tt \$meminit} cells by the language frontend.
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The \B{MEMID} parameter on these cells is used to link them together and to the RTLIL::Memory object they belong to.
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The rationale behind using separate cells for the individual ports versus
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creating a large multiport memory cell right in the language frontend is that
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