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	Add some more comments
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			@ -2,9 +2,14 @@
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set -e
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# NB: *.aag and *.aig must contain a symbol table naming the primary
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#     inputs and outputs, otherwise ABC and Yosys will name them
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#     arbitrarily (and inconsistently with each other).
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for aag in *.aag; do
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    # Since ABC cannot read *.aag, read the *.aig instead
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    # (which would have been created by the reference aig2aig utility)
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    # (which would have been created by the reference aig2aig utility,
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    #  available from http://fmv.jku.at/aiger/)
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    ../../yosys-abc -c "read -c ${aag%.*}.aig; write ${aag%.*}_ref.v"
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    ../../yosys -p "
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read_verilog ${aag%.*}_ref.v
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