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Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3

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This commit is contained in:
Clifford Wolf 2014-07-23 08:40:31 +02:00
parent 260c19ec5a
commit a8d3a68971
15 changed files with 33 additions and 47 deletions
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2
passes/memory/memory_share.cc
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@ -613,7 +613,7 @@ struct MemoryShareWorker
groups_en[key] = grouped_en->width;
grouped_en->width++;
}
en.append(RTLIL::SigSpec(grouped_en, 1, groups_en[key]));
en.append(RTLIL::SigSpec::grml(grouped_en, groups_en[key]));
}
module->addMux(NEW_ID, grouped_last_en, grouped_this_en, this_en_active, grouped_en);