From a8cc9202b9b9aa13973d595b138caca0aa4b570f Mon Sep 17 00:00:00 2001
From: Robert O'Callahan <rocallahan@google.com>
Date: Thu, 28 Aug 2025 03:53:51 +0000
Subject: [PATCH] Update passes/techmap to avoid bits()

---
 passes/techmap/abc9_ops.cc    | 11 +++++++----
 passes/techmap/dffinit.cc     |  6 +++---
 passes/techmap/dfflegalize.cc |  8 ++++----
 passes/techmap/flowmap.cc     |  2 +-
 passes/techmap/techmap.cc     |  9 +++++----
 passes/techmap/zinit.cc       |  2 +-
 6 files changed, 21 insertions(+), 17 deletions(-)

diff --git a/passes/techmap/abc9_ops.cc b/passes/techmap/abc9_ops.cc
index ee0a903c2..839860b41 100644
--- a/passes/techmap/abc9_ops.cc
+++ b/passes/techmap/abc9_ops.cc
@@ -1216,7 +1216,7 @@ void reintegrate(RTLIL::Module *module, bool dff_mode)
 			auto Qi = initmap(Q);
 			auto it = Qi.wire->attributes.find(ID::init);
 			if (it != Qi.wire->attributes.end())
-				it->second.bits()[Qi.offset] = State::Sx;
+				it->second.set(Qi.offset, State::Sx);
 		}
 		else if (cell->type.in(ID($_AND_), ID($_NOT_)))
 			module->remove(cell);
@@ -1526,8 +1526,11 @@ void reintegrate(RTLIL::Module *module, bool dff_mode)
 			log_assert(index < GetSize(A));
 			int i = 0;
 			while (i < GetSize(mask)) {
-				for (int j = 0; j < (1 << index); j++)
-					std::swap(mask.bits()[i+j], mask.bits()[i+j+(1 << index)]);
+				for (int j = 0; j < (1 << index); j++) {
+					State bit = mask[i+j];
+					mask.set(i+j, mask[i+j+(1 << index)]);
+					mask.set(i+j+(1 << index), bit);
+				}
 				i += 1 << (index+1);
 			}
 			A[index] = y_bit;
@@ -1542,7 +1545,7 @@ void reintegrate(RTLIL::Module *module, bool dff_mode)
 		// and get cleaned away
 clone_lut:
 		driver_mask = driver_lut->getParam(ID::LUT);
-		for (auto &b : driver_mask.bits()) {
+		for (auto b : driver_mask) {
 			if (b == RTLIL::State::S0) b = RTLIL::State::S1;
 			else if (b == RTLIL::State::S1) b = RTLIL::State::S0;
 		}
diff --git a/passes/techmap/dffinit.cc b/passes/techmap/dffinit.cc
index ee83105fd..013675c8a 100644
--- a/passes/techmap/dffinit.cc
+++ b/passes/techmap/dffinit.cc
@@ -118,13 +118,13 @@ struct DffinitPass : public Pass {
 					for (int i = 0; i < GetSize(sig); i++) {
 						if (initval[i] == State::Sx)
 							continue;
-						while (GetSize(value) <= i)
-							value.bits().push_back(State::S0);
+						if (GetSize(value) <= i)
+							value.resize(i + 1, State::S0);
 						if (noreinit && value[i] != State::Sx && value[i] != initval[i])
 							log_error("Trying to assign a different init value for %s.%s.%s which technically "
 									"have a conflicted init value.\n",
 									log_id(module), log_id(cell), log_id(it.second));
-						value.bits()[i] = initval[i];
+						value.set(i, initval[i]);
 					}
 
 					if (highlow_mode && GetSize(value) != 0) {
diff --git a/passes/techmap/dfflegalize.cc b/passes/techmap/dfflegalize.cc
index 9dfc20896..b5fd3db05 100644
--- a/passes/techmap/dfflegalize.cc
+++ b/passes/techmap/dfflegalize.cc
@@ -869,17 +869,17 @@ struct DffLegalizePass : public Pass {
 			if (ff.has_arst) {
 				if (ff.val_arst[i] == State::Sx) {
 					if (!(supported & (mask << 8)))
-						ff.val_arst.bits()[i] = State::S0;
+						ff.val_arst.set(i, State::S0);
 					if (!(supported & (mask << 4)))
-						ff.val_arst.bits()[i] = State::S1;
+						ff.val_arst.set(i, State::S1);
 				}
 			}
 			if (ff.has_srst) {
 				if (ff.val_srst[i] == State::Sx) {
 					if (!(supported & (mask << 8)))
-						ff.val_srst.bits()[i] = State::S0;
+						ff.val_srst.set(i, State::S0);
 					if (!(supported & (mask << 4)))
-						ff.val_srst.bits()[i] = State::S1;
+						ff.val_srst.set(i, State::S1);
 				}
 			}
 		}
diff --git a/passes/techmap/flowmap.cc b/passes/techmap/flowmap.cc
index 61966195c..9ababd9dd 100644
--- a/passes/techmap/flowmap.cc
+++ b/passes/techmap/flowmap.cc
@@ -1401,7 +1401,7 @@ struct FlowmapWorker
 					          log_signal(node), log_signal(undef), env.c_str());
 				}
 
-				lut_table.bits()[i] = value.as_bool() ? State::S1 : State::S0;
+				lut_table.set(i, value.as_bool() ? State::S1 : State::S0);
 				ce.pop();
 			}
 
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 95c733f62..48a25ef6d 100644
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -680,15 +680,16 @@ struct TechmapWorker
 
 					for (auto &conn : cell->connections())
 						if (tpl->avail_parameters.count(stringf("\\_TECHMAP_CONNMAP_%s_", log_id(conn.first))) != 0) {
-							RTLIL::Const value;
-							for (auto &bit : sigmap(conn.second)) {
+							SigSpec sm = sigmap(conn.second);
+							RTLIL::Const::Builder builder(GetSize(sm) * bits);
+							for (auto &bit : sm) {
 								int val = unique_bit_id.at(bit);
 								for (int i = 0; i < bits; i++) {
-									value.bits().push_back((val & 1) != 0 ? State::S1 : State::S0);
+									builder.push_back((val & 1) != 0 ? State::S1 : State::S0);
 									val = val >> 1;
 								}
 							}
-							parameters.emplace(stringf("\\_TECHMAP_CONNMAP_%s_", log_id(conn.first)), value);
+							parameters.emplace(stringf("\\_TECHMAP_CONNMAP_%s_", log_id(conn.first)), builder.build());
 						}
 				}
 
diff --git a/passes/techmap/zinit.cc b/passes/techmap/zinit.cc
index bf049eab7..38936e64d 100644
--- a/passes/techmap/zinit.cc
+++ b/passes/techmap/zinit.cc
@@ -76,7 +76,7 @@ struct ZinitPass : public Pass {
 					if (ff.val_init[i] == State::S1)
 						bits.insert(i);
 					else if (ff.val_init[i] != State::S0 && all_mode)
-						ff.val_init.bits()[i] = State::S0;
+						ff.val_init.set(i, State::S0);
 				}
 				ff.flip_bits(bits);
 				ff.emit();