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https://github.com/YosysHQ/yosys
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Migrate build system to CMake
See #5895 for details. This commit does not include CI or documentation changes.
This commit is contained in:
Catherine
parent
0ef0a8881e
commit
a867291e4e
206 changed files with 5179 additions and 2302 deletions
101
techlibs/lattice/CMakeLists.txt
Normal file
101
techlibs/lattice/CMakeLists.txt
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@ -0,0 +1,101 @@
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pmgen_command(lattice_dsp_nexus
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lattice_dsp_nexus.pmg
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)
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yosys_pass(lattice_dsp_nexus
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lattice_dsp_nexus.cc
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${PMGEN_lattice_dsp_nexus_OUTPUT}
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)
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yosys_pass(lattice_gsr
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lattice_gsr.cc
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)
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yosys_pass(synth_lattice
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synth_lattice.cc
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REQUIRES
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abc
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abc9
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alumacc
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attrmvcp
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autoname
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blackbox
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booth
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check
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clean
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deminout
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dfflegalize
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flatten
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fsm
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hierarchy
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iopadmap
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lattice_dsp_nexus
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lattice_gsr
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memory
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memory_libmap
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memory_map
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opt
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opt_clean
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opt_expr
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opt_lut_ins
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opt_merge
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peepopt
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proc
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read_verilog
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share
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simplemap
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stat
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techmap
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tribuf
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wreduce
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write_edif
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write_json
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zinit
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DATA_EXPLICIT
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lattice/cells_ff.vh cells_ff.vh
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lattice/cells_io.vh cells_io.vh
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lattice/cells_map_trellis.v cells_map_trellis.v
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lattice/cells_map_nexus.v cells_map_nexus.v
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lattice/common_sim.vh common_sim.vh
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lattice/parse_init.vh parse_init.vh
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lattice/ccu2d_sim.vh ccu2d_sim.vh
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lattice/ccu2c_sim.vh ccu2c_sim.vh
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lattice/cells_sim_ecp5.v cells_sim_ecp5.v
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lattice/cells_sim_xo2.v cells_sim_xo2.v
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lattice/cells_sim_xo3.v cells_sim_xo3.v
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lattice/cells_sim_xo3d.v cells_sim_xo3d.v
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lattice/cells_sim_nexus.v cells_sim_nexus.v
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lattice/cells_bb_ecp5.v cells_bb_ecp5.v
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lattice/cells_bb_xo2.v cells_bb_xo2.v
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lattice/cells_bb_xo3.v cells_bb_xo3.v
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lattice/cells_bb_xo3d.v cells_bb_xo3d.v
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lattice/cells_bb_nexus.v cells_bb_nexus.v
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lattice/lutrams_map_trellis.v lutrams_map_trellis.v
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lattice/lutrams_trellis.txt lutrams_trellis.txt
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lattice/lutrams_map_nexus.v lutrams_map_nexus.v
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lattice/lutrams_nexus.txt lutrams_nexus.txt
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lattice/lrams_map_nexus.v lrams_map_nexus.v
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lattice/lrams_nexus.txt lrams_nexus.txt
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lattice/brams_map_16kd.v brams_map_16kd.v
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lattice/brams_16kd.txt brams_16kd.txt
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lattice/brams_map_8kc.v brams_map_8kc.v
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lattice/brams_8kc.txt brams_8kc.txt
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lattice/brams_map_nexus.v brams_map_nexus.v
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lattice/brams_nexus.txt brams_nexus.txt
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lattice/arith_map_ccu2c.v arith_map_ccu2c.v
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lattice/arith_map_ccu2d.v arith_map_ccu2d.v
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lattice/arith_map_nexus.v arith_map_nexus.v
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lattice/latches_map.v latches_map.v
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lattice/dsp_map_18x18.v dsp_map_18x18.v
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lattice/dsp_map_nexus.v dsp_map_nexus.v
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ecp5/cells_ff.vh cells_ff.vh
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ecp5/cells_io.vh cells_io.vh
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ecp5/common_sim.vh common_sim.vh
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ecp5/ccu2c_sim.vh ccu2c_sim.vh
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ecp5/cells_sim.v cells_sim_ecp5.v
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ecp5/cells_bb.v cells_bb_ecp5.v
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nexus/parse_init.vh parse_init.vh
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nexus/cells_sim.v cells_sim_nexus.v
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nexus/cells_xtra.v cells_bb_nexus.v
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)
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@ -1,60 +0,0 @@
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OBJS += techlibs/lattice/synth_lattice.o
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OBJS += techlibs/lattice/lattice_gsr.o
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OBJS += techlibs/lattice/lattice_dsp_nexus.o
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_ff.vh))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_io.vh))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_map_trellis.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_map_nexus.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/common_sim.vh))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/parse_init.vh))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/ccu2d_sim.vh))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/ccu2c_sim.vh))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_sim_ecp5.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_sim_xo2.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_sim_xo3.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_sim_xo3d.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_sim_nexus.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_bb_ecp5.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_bb_xo2.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_bb_xo3.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_bb_xo3d.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/cells_bb_nexus.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/lutrams_map_trellis.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/lutrams_trellis.txt))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/lutrams_map_nexus.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/lutrams_nexus.txt))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/lrams_map_nexus.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/lrams_nexus.txt))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/brams_map_16kd.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/brams_16kd.txt))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/brams_map_8kc.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/brams_8kc.txt))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/brams_map_nexus.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/brams_nexus.txt))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/arith_map_ccu2c.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/arith_map_ccu2d.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/arith_map_nexus.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/latches_map.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/dsp_map_18x18.v))
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$(eval $(call add_share_file,share/lattice,techlibs/lattice/dsp_map_nexus.v))
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$(eval $(call add_share_file,share/ecp5,techlibs/lattice/cells_ff.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/lattice/cells_io.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/lattice/common_sim.vh))
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$(eval $(call add_share_file,share/ecp5,techlibs/lattice/ccu2c_sim.vh))
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$(eval $(call add_share_file_and_rename,share/ecp5,techlibs/lattice/cells_sim_ecp5.v,cells_sim.v))
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$(eval $(call add_share_file_and_rename,share/ecp5,techlibs/lattice/cells_bb_ecp5.v,cells_bb.v))
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$(eval $(call add_share_file,share/nexus,techlibs/lattice/parse_init.vh))
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$(eval $(call add_share_file_and_rename,share/nexus,techlibs/lattice/cells_sim_nexus.v,cells_sim.v))
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$(eval $(call add_share_file_and_rename,share/nexus,techlibs/lattice/cells_bb_nexus.v,cells_xtra.v))
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techlibs/lattice/%_pm.h: passes/pmgen/pmgen.py techlibs/lattice/%.pmg
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$(P) mkdir -p $(dir $@) && $(PYTHON_EXECUTABLE) $< -o $@ -p $(notdir $*) $(filter-out $<,$^)
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GENFILES += techlibs/lattice/lattice_dsp_nexus_pm.h
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techlibs/lattice/lattice_dsp_nexus.o: techlibs/lattice/lattice_dsp_nexus_pm.h
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$(eval $(call add_extra_objs,techlibs/lattice/lattice_dsp_nexus_pm.h))
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