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techmap: Add support for extracting init values of ports

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Marcin Kościelnicki 2019-08-16 03:14:03 +00:00
parent de8adecd39
commit a82e8df7d3
3 changed files with 169 additions and 1 deletions
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@ -38,6 +38,7 @@ Yosys 0.9 .. Yosys 0.9-dev
- Improvements in pmgen: slices, choices, define, generate
- Added "xilinx_srl" for Xilinx shift register extraction
- Removed "shregmap -tech xilinx" (superseded by "xilinx_srl")
- Added "_TECHMAP_WIREINIT_*_" attribute and "_TECHMAP_REMOVEINIT_*_" wire for "techmap" pass
Yosys 0.8 .. Yosys 0.9
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