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ice40: specify fixes

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This commit is contained in:
Eddie Hung 2020-02-13 10:30:56 -08:00
parent 7c92b6852f
commit a76520112d
3 changed files with 66 additions and 66 deletions
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18
techlibs/ice40/synth_ice40.cc
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@ -236,15 +236,15 @@ struct SynthIce40Pass : public ScriptPass
void script() YS_OVERRIDE
{
std::string define;
if (device_opt == "lp")
define = "-D ICE40_LP";
else if (device_opt == "u")
define = "-D ICE40_U";
else
define = "-D ICE40_HX";
if (check_label("begin"))
{
std::string define;
if (device_opt == "lp")
define = "-D ICE40_LP";
else if (device_opt == "u")
define = "-D ICE40_U";
else
define = "-D ICE40_HX";
run("read_verilog " + define + " -lib -specify +/ice40/cells_sim.v");
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
run("proc");
@ -352,7 +352,7 @@ struct SynthIce40Pass : public ScriptPass
}
if (!noabc) {
if (abc9) {
run("read_verilog -icells -lib -specify +/abc9_model.v +/ice40/abc9_model.v");
run("read_verilog " + define + " -icells -lib -specify +/abc9_model.v +/ice40/abc9_model.v");
int wire_delay;
if (device_opt == "lp")
wire_delay = 400;
@ -360,7 +360,7 @@ struct SynthIce40Pass : public ScriptPass
wire_delay = 750;
else
wire_delay = 250;
run(stringf("abc9 -W %d", wire_delay, device_opt.c_str(), device_opt.c_str()));
run(stringf("abc9 -W %d", wire_delay));
}
else
run("abc -dress -lut 4", "(skip if -noabc)");