mirror of
https://github.com/YosysHQ/yosys
synced 2026-06-29 12:08:51 +00:00
Remove trailing whitespaces
This commit is contained in:
parent
48a3dcc02a
commit
a689342207
317 changed files with 3136 additions and 3136 deletions
|
|
@ -178,7 +178,7 @@ module testbench;
|
|||
{RSTA, RSTALLCARRYIN, RSTALUMODE, RSTB, RSTC, RSTCTRL, RSTD, RSTINMODE, RSTM, RSTP} = $urandom & $urandom & $urandom & $urandom & $urandom & $urandom;
|
||||
{ALUMODE, INMODE} = $urandom;
|
||||
CARRYINSEL = $urandom & $urandom & $urandom;
|
||||
OPMODE = $urandom;
|
||||
OPMODE = $urandom;
|
||||
if ($urandom & 1'b1)
|
||||
OPMODE[3:0] = 4'b0101; // test multiply more than other modes
|
||||
{CARRYCASCIN, CARRYIN, MULTSIGNIN} = $urandom;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue