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Remove trailing whitespaces

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This commit is contained in:
Miodrag Milanovic 2026-06-23 07:24:59 +02:00
parent 48a3dcc02a
commit a689342207
317 changed files with 3136 additions and 3136 deletions
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2
passes/techmap/abc9.cc
View file

@ -398,7 +398,7 @@ struct Abc9Pass : public ScriptPass
log_error("Can't handle partially selected module %s!\n", mod);
std::string tempdir_name;
if (cleanup)
if (cleanup)
tempdir_name = get_base_tmpdir() + "/";
else
tempdir_name = "_tmp_";

2
passes/techmap/abc_new.cc
View file

@ -135,7 +135,7 @@ struct AbcNewPass : public ScriptPass {
void script() override
{
if (check_label("check")) {
run("abc9_ops -check");
run("abc9_ops -check");
}
if (check_label("prep_boxes")) {

4
passes/techmap/booth.cc
View file

@ -260,7 +260,7 @@ struct BoothPassWorker {
y_sz_revised = y_sz + 1;
} else {
x_sz_revised = y_sz;
}
}
} else {
if (x_sz % 2 != 0) {
y_sz_revised = x_sz + 1;
@ -804,7 +804,7 @@ struct BoothPassWorker {
c_result = c_wire;
debug_csa_trees[column_ix].push_back(csa);
csa_ix++;
csa_ix++;
if (var_ix <= column_bits.size() - 1)
carry_bits_to_sum.append(c_wire);

2
passes/techmap/dfflegalize.cc
View file

@ -139,7 +139,7 @@ struct DffLegalizePass : public Pass {
}
// Table of all supported cell types.
// First index in the array is one of the FF_* values, second
// First index in the array is one of the FF_* values, second
// index is the set of negative-polarity inputs (OR of NEG_*
// values), and the value is the set of supported init values
// (OR of INIT_* values).

4
passes/techmap/extract_counter.cc
View file

@ -326,12 +326,12 @@ int counter_tryextract(
return 24;
//Mux should have A driven by count Q, and B by muxy
//if A and B are swapped, CE polarity is inverted
if(sigmap(cemux->getPort(ID::B)) == muxy &&
if(sigmap(cemux->getPort(ID::B)) == muxy &&
sigmap(cemux->getPort(ID::A)) == sigmap(count_reg->getPort(ID::Q)))
{
extract.ce_inverted = false;
}
else if(sigmap(cemux->getPort(ID::A)) == muxy &&
else if(sigmap(cemux->getPort(ID::A)) == muxy &&
sigmap(cemux->getPort(ID::B)) == sigmap(count_reg->getPort(ID::Q)))
{
extract.ce_inverted = true;

4
passes/techmap/libparse.cc
View file

@ -652,7 +652,7 @@ LibertyAst *LibertyParser::parse(bool top_level)
return NULL;
if (tok != 'v') {
report_unexpected_token(tok);
report_unexpected_token(tok);
}
LibertyAst *ast = new LibertyAst;
@ -662,7 +662,7 @@ LibertyAst *LibertyParser::parse(bool top_level)
{
tok = lexer(str);
// allow both ';' and new lines to
// allow both ';' and new lines to
// terminate a statement.
if ((tok == ';') || (tok == 'n'))
break;

6
passes/techmap/lut2mux.cc
View file

@ -33,7 +33,7 @@ int lut2mux(Cell *cell, bool word_mode)
if (GetSize(sig_a) == 1)
{
if (!word_mode)
cell->module->addMuxGate(NEW_ID, lut.extract(0)[0], lut.extract(1)[0], sig_a, sig_y);
cell->module->addMuxGate(NEW_ID, lut.extract(0)[0], lut.extract(1)[0], sig_a, sig_y);
else
cell->module->addMux(NEW_ID, lut.extract(0)[0], lut.extract(1)[0], sig_a, sig_y);
}
@ -47,11 +47,11 @@ int lut2mux(Cell *cell, bool word_mode)
Const lut1 = lut.extract(0, GetSize(lut)/2);
Const lut2 = lut.extract(GetSize(lut)/2, GetSize(lut)/2);
count += lut2mux(cell->module->addLut(NEW_ID, sig_a_lo, sig_y1, lut1), word_mode);
count += lut2mux(cell->module->addLut(NEW_ID, sig_a_lo, sig_y1, lut1), word_mode);
count += lut2mux(cell->module->addLut(NEW_ID, sig_a_lo, sig_y2, lut2), word_mode);
if (!word_mode)
cell->module->addMuxGate(NEW_ID, sig_y1, sig_y2, sig_a_hi, sig_y);
cell->module->addMuxGate(NEW_ID, sig_y1, sig_y2, sig_a_hi, sig_y);
else
cell->module->addMux(NEW_ID, sig_y1, sig_y2, sig_a_hi, sig_y);
}

2
passes/techmap/techmap.cc
View file

@ -333,7 +333,7 @@ struct TechmapWorker
RTLIL::Cell *c = module->addCell(c_name, tpl_cell);
design->select(module, c);
if (c->type == ID::_TECHMAP_PLACEHOLDER_ && tpl_cell->has_attribute(ID::techmap_chtype)) {
c->type = RTLIL::escape_id(tpl_cell->get_string_attribute(ID::techmap_chtype));
c->attributes.erase(ID::techmap_chtype);