diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index c3a415f36..378c976ef 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -1152,6 +1152,35 @@ bool RTLIL::Design::selected_whole_module(RTLIL::Module *mod) const
 	return selected_whole_module(mod->name);
 }
 
+void RTLIL::Design::push_selection(RTLIL::Selection sel)
+{
+	sel.current_design = this;
+	selection_stack.push_back(sel);
+}
+
+void RTLIL::Design::push_empty_selection()
+{
+	RTLIL::Selection sel(false, false, this);
+	push_selection(sel);
+}
+
+void RTLIL::Design::push_full_selection()
+{
+	RTLIL::Selection sel(true, false, this);
+	push_selection(sel);
+}
+
+void RTLIL::Design::push_complete_selection()
+{
+	RTLIL::Selection sel(true, true, this);
+	sel.optimize(this);
+	push_selection(sel);
+}
+
+void RTLIL::Design::pop_selection()
+{
+	selection_stack.pop_back();
+}
 
 std::vector<RTLIL::Module*> RTLIL::Design::selected_modules(RTLIL::SelectPartials partials, RTLIL::SelectBoxes boxes) const
 {
@@ -2462,6 +2491,16 @@ bool RTLIL::Module::has_processes_warn() const
 	return !processes.empty();
 }
 
+bool RTLIL::Module::is_selected() const
+{
+	return design->selected_module(this->name);
+}
+
+bool RTLIL::Module::is_selected_whole() const
+{
+	return design->selected_whole_module(this->name);
+}
+
 std::vector<RTLIL::Wire*> RTLIL::Module::selected_wires() const
 {
 	std::vector<RTLIL::Wire*> result;
diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 9c9103bb6..57030d133 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -1280,6 +1280,12 @@ struct RTLIL::Design
 	bool selected_module(RTLIL::Module *mod) const;
 	bool selected_whole_module(RTLIL::Module *mod) const;
 
+	void push_selection(RTLIL::Selection sel);
+	void push_empty_selection();
+	void push_full_selection();
+	void push_complete_selection();
+	void pop_selection();
+
 	RTLIL::Selection &selection() {
 		return selection_stack.back();
 	}
@@ -1401,6 +1407,9 @@ public:
 	bool has_memories_warn() const;
 	bool has_processes_warn() const;
 
+	bool is_selected() const;
+	bool is_selected_whole() const;
+
 	std::vector<RTLIL::Wire*> selected_wires() const;
 	std::vector<RTLIL::Cell*> selected_cells() const;
 	std::vector<RTLIL::Memory*> selected_memories() const;