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fmt: FmtPart::{STRING→LITERAL},{CHARACTER→STRING}.

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Before this commit, the `STRING` variant inserted a literal string;
the `CHARACTER` variant inserted a string. This commit renames them
to `LITERAL` and `STRING` respectively.
This commit is contained in:
Catherine 2024-03-28 06:30:16 +00:00 committed by Marcelina Kościelnicka
parent 0210509dea
commit a5441bc00c
5 changed files with 37 additions and 37 deletions
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14
backends/cxxrtl/runtime/cxxrtl/cxxrtl.h
View file

@ -1010,19 +1010,19 @@ struct observer {
// Default member initializers would make this a non-aggregate-type in C++11, so they are commented out. // Default member initializers would make this a non-aggregate-type in C++11, so they are commented out.
struct fmt_part { struct fmt_part {
enum { enum {
STRING = 0, LITERAL = 0,
INTEGER = 1, INTEGER = 1,
CHARACTER = 2, STRING = 2,
VLOG_TIME = 3, VLOG_TIME = 3,
} type; } type;
// STRING type // LITERAL type
std::string str; std::string str;
// INTEGER/CHARACTER types // INTEGER/STRING types
// + value<Bits> val; // + value<Bits> val;
// INTEGER/CHARACTER/VLOG_TIME types // INTEGER/STRING/VLOG_TIME types
enum { enum {
RIGHT = 0, RIGHT = 0,
LEFT = 1, LEFT = 1,
@ -1050,10 +1050,10 @@ struct fmt_part {
// chunk access if it turns out to be slow enough to matter. // chunk access if it turns out to be slow enough to matter.
std::string buf; std::string buf;
switch (type) { switch (type) {
case STRING: case LITERAL:
return str; return str;
case CHARACTER: { case STRING: {
buf.reserve(Bits/8); buf.reserve(Bits/8);
for (int i = 0; i < Bits; i += 8) { for (int i = 0; i < Bits; i += 8) {
char ch = 0; char ch = 0;

2
frontends/ast/genrtlil.cc
View file

@ -790,7 +790,7 @@ struct AST_INTERNAL::ProcessGenerator
Fmt fmt; Fmt fmt;
fmt.parse_verilog(args, /*sformat_like=*/false, default_base, /*task_name=*/ast->str, current_module->name); fmt.parse_verilog(args, /*sformat_like=*/false, default_base, /*task_name=*/ast->str, current_module->name);
if (ast->str.substr(0, 8) == "$display") if (ast->str.substr(0, 8) == "$display")
fmt.append_string("\n"); fmt.append_literal("\n");
fmt.emit_rtlil(cell); fmt.emit_rtlil(cell);
} else if (!ast->str.empty()) { } else if (!ast->str.empty()) {
log_file_error(ast->filename, ast->location.first_line, "Found unsupported invocation of system task `%s'!\n", ast->str.c_str()); log_file_error(ast->filename, ast->location.first_line, "Found unsupported invocation of system task `%s'!\n", ast->str.c_str());

2
frontends/ast/simplify.cc
View file

@ -1079,7 +1079,7 @@ bool AstNode::simplify(bool const_fold, int stage, int width_hint, bool sign_hin
// when $display()/$write() functions are used in an initial block, print them during synthesis // when $display()/$write() functions are used in an initial block, print them during synthesis
Fmt fmt = processFormat(stage, /*sformat_like=*/false, default_base, /*first_arg_at=*/0, /*may_fail=*/true); Fmt fmt = processFormat(stage, /*sformat_like=*/false, default_base, /*first_arg_at=*/0, /*may_fail=*/true);
if (str.substr(0, 8) == "$display") if (str.substr(0, 8) == "$display")
fmt.append_string("\n"); fmt.append_literal("\n");
log("%s", fmt.render().c_str()); log("%s", fmt.render().c_str());
} }

44
kernel/fmt.cc
View file

@ -22,9 +22,9 @@
USING_YOSYS_NAMESPACE USING_YOSYS_NAMESPACE
void Fmt::append_string(const std::string &str) { void Fmt::append_literal(const std::string &str) {
FmtPart part = {}; FmtPart part = {};
part.type = FmtPart::STRING; part.type = FmtPart::LITERAL;
part.str = str; part.str = str;
parts.push_back(part); parts.push_back(part);
} }
@ -46,7 +46,7 @@ void Fmt::parse_rtlil(const RTLIL::Cell *cell) {
log_assert(false && "Unexpected '}' in format string"); log_assert(false && "Unexpected '}' in format string");
else if (fmt[i] == '{') { else if (fmt[i] == '{') {
if (!part.str.empty()) { if (!part.str.empty()) {
part.type = FmtPart::STRING; part.type = FmtPart::LITERAL;
parts.push_back(part); parts.push_back(part);
part = {}; part = {};
} }
@ -108,7 +108,7 @@ void Fmt::parse_rtlil(const RTLIL::Cell *cell) {
part.type = FmtPart::INTEGER; part.type = FmtPart::INTEGER;
part.base = 16; part.base = 16;
} else if (fmt[i] == 'c') { } else if (fmt[i] == 'c') {
part.type = FmtPart::CHARACTER; part.type = FmtPart::STRING;
} else if (fmt[i] == 't') { } else if (fmt[i] == 't') {
part.type = FmtPart::VLOG_TIME; part.type = FmtPart::VLOG_TIME;
} else if (fmt[i] == 'r') { } else if (fmt[i] == 'r') {
@ -150,7 +150,7 @@ void Fmt::parse_rtlil(const RTLIL::Cell *cell) {
} }
} }
if (!part.str.empty()) { if (!part.str.empty()) {
part.type = FmtPart::STRING; part.type = FmtPart::LITERAL;
parts.push_back(part); parts.push_back(part);
} }
} }
@ -161,7 +161,7 @@ void Fmt::emit_rtlil(RTLIL::Cell *cell) const {
for (auto &part : parts) { for (auto &part : parts) {
switch (part.type) { switch (part.type) {
case FmtPart::STRING: case FmtPart::LITERAL:
for (char c : part.str) { for (char c : part.str) {
if (c == '{') if (c == '{')
fmt += "{{"; fmt += "{{";
@ -175,7 +175,7 @@ void Fmt::emit_rtlil(RTLIL::Cell *cell) const {
case FmtPart::VLOG_TIME: case FmtPart::VLOG_TIME:
log_assert(part.sig.size() == 0); log_assert(part.sig.size() == 0);
YS_FALLTHROUGH YS_FALLTHROUGH
case FmtPart::CHARACTER: case FmtPart::STRING:
log_assert(part.sig.size() % 8 == 0); log_assert(part.sig.size() % 8 == 0);
YS_FALLTHROUGH YS_FALLTHROUGH
case FmtPart::INTEGER: case FmtPart::INTEGER:
@ -203,7 +203,7 @@ void Fmt::emit_rtlil(RTLIL::Cell *cell) const {
if (part.plus) if (part.plus)
fmt += '+'; fmt += '+';
fmt += part.signed_ ? 's' : 'u'; fmt += part.signed_ ? 's' : 'u';
} else if (part.type == FmtPart::CHARACTER) { } else if (part.type == FmtPart::STRING) {
fmt += 'c'; fmt += 'c';
} else if (part.type == FmtPart::VLOG_TIME) { } else if (part.type == FmtPart::VLOG_TIME) {
if (part.realtime) if (part.realtime)
@ -299,12 +299,12 @@ void Fmt::apply_verilog_automatic_sizing_and_add(FmtPart &part)
part.width = places; part.width = places;
if (part.justify == FmtPart::RIGHT) { if (part.justify == FmtPart::RIGHT) {
append_string(gap); append_literal(gap);
parts.push_back(part); parts.push_back(part);
} else { } else {
part.justify = FmtPart::RIGHT; part.justify = FmtPart::RIGHT;
parts.push_back(part); parts.push_back(part);
append_string(gap); append_literal(gap);
} }
} }
} }
@ -355,7 +355,7 @@ void Fmt::parse_verilog(const std::vector<VerilogFmtArg> &args, bool sformat_lik
part.str += module_name.str(); part.str += module_name.str();
} else { } else {
if (!part.str.empty()) { if (!part.str.empty()) {
part.type = FmtPart::STRING; part.type = FmtPart::LITERAL;
parts.push_back(part); parts.push_back(part);
part = {}; part = {};
} }
@ -408,11 +408,11 @@ void Fmt::parse_verilog(const std::vector<VerilogFmtArg> &args, bool sformat_lik
part.type = FmtPart::INTEGER; part.type = FmtPart::INTEGER;
part.base = 16; part.base = 16;
} else if (fmt[i] == 'c' || fmt[i] == 'C') { } else if (fmt[i] == 'c' || fmt[i] == 'C') {
part.type = FmtPart::CHARACTER; part.type = FmtPart::STRING;
part.sig.extend_u0(8); part.sig.extend_u0(8);
// %10c and %010c not fully defined in IEEE 1800-2017 and do different things in iverilog // %10c and %010c not fully defined in IEEE 1800-2017 and do different things in iverilog
} else if (fmt[i] == 's' || fmt[i] == 'S') { } else if (fmt[i] == 's' || fmt[i] == 'S') {
part.type = FmtPart::CHARACTER; part.type = FmtPart::STRING;
if ((part.sig.size() % 8) != 0) if ((part.sig.size() % 8) != 0)
part.sig.extend_u0((part.sig.size() + 7) / 8 * 8); part.sig.extend_u0((part.sig.size() + 7) / 8 * 8);
// %10s and %010s not fully defined in IEEE 1800-2017 and do the same thing in iverilog // %10s and %010s not fully defined in IEEE 1800-2017 and do the same thing in iverilog
@ -449,12 +449,12 @@ void Fmt::parse_verilog(const std::vector<VerilogFmtArg> &args, bool sformat_lik
} }
} }
if (!part.str.empty()) { if (!part.str.empty()) {
part.type = FmtPart::STRING; part.type = FmtPart::LITERAL;
parts.push_back(part); parts.push_back(part);
} }
} else { } else {
FmtPart part = {}; FmtPart part = {};
part.type = FmtPart::STRING; part.type = FmtPart::LITERAL;
part.str = arg->str; part.str = arg->str;
parts.push_back(part); parts.push_back(part);
} }
@ -474,7 +474,7 @@ std::vector<VerilogFmtArg> Fmt::emit_verilog() const
for (auto &part : parts) { for (auto &part : parts) {
switch (part.type) { switch (part.type) {
case FmtPart::STRING: case FmtPart::LITERAL:
for (char c : part.str) { for (char c : part.str) {
if (c == '%') if (c == '%')
fmt.str += "%%"; fmt.str += "%%";
@ -513,7 +513,7 @@ std::vector<VerilogFmtArg> Fmt::emit_verilog() const
break; break;
} }
case FmtPart::CHARACTER: { case FmtPart::STRING: {
VerilogFmtArg arg; VerilogFmtArg arg;
arg.type = VerilogFmtArg::INTEGER; arg.type = VerilogFmtArg::INTEGER;
arg.sig = part.sig; arg.sig = part.sig;
@ -599,9 +599,9 @@ void Fmt::emit_cxxrtl(std::ostream &os, std::string indent, std::function<void(c
os << indent << "buf += fmt_part { "; os << indent << "buf += fmt_part { ";
os << "fmt_part::"; os << "fmt_part::";
switch (part.type) { switch (part.type) {
case FmtPart::STRING: os << "STRING"; break; case FmtPart::LITERAL: os << "LITERAL"; break;
case FmtPart::INTEGER: os << "INTEGER"; break; case FmtPart::INTEGER: os << "INTEGER"; break;
case FmtPart::CHARACTER: os << "CHARACTER"; break; case FmtPart::STRING: os << "STRING"; break;
case FmtPart::VLOG_TIME: os << "VLOG_TIME"; break; case FmtPart::VLOG_TIME: os << "VLOG_TIME"; break;
} }
os << ", "; os << ", ";
@ -631,12 +631,12 @@ std::string Fmt::render() const
for (auto &part : parts) { for (auto &part : parts) {
switch (part.type) { switch (part.type) {
case FmtPart::STRING: case FmtPart::LITERAL:
str += part.str; str += part.str;
break; break;
case FmtPart::INTEGER: case FmtPart::INTEGER:
case FmtPart::CHARACTER: case FmtPart::STRING:
case FmtPart::VLOG_TIME: { case FmtPart::VLOG_TIME: {
std::string buf; std::string buf;
if (part.type == FmtPart::INTEGER) { if (part.type == FmtPart::INTEGER) {
@ -718,7 +718,7 @@ std::string Fmt::render() const
std::reverse(buf.begin(), buf.end()); std::reverse(buf.begin(), buf.end());
} }
} else log_abort(); } else log_abort();
} else if (part.type == FmtPart::CHARACTER) { } else if (part.type == FmtPart::STRING) {
buf = part.sig.as_const().decode_string(); buf = part.sig.as_const().decode_string();
} else if (part.type == FmtPart::VLOG_TIME) { } else if (part.type == FmtPart::VLOG_TIME) {
// We only render() during initial, so time is always zero. // We only render() during initial, so time is always zero.

12
kernel/fmt.h
View file

@ -53,19 +53,19 @@ struct VerilogFmtArg {
// Must be kept in sync with `struct fmt_part` in backends/cxxrtl/runtime/cxxrtl/cxxrtl.h! // Must be kept in sync with `struct fmt_part` in backends/cxxrtl/runtime/cxxrtl/cxxrtl.h!
struct FmtPart { struct FmtPart {
enum { enum {
STRING = 0, LITERAL = 0,
INTEGER = 1, INTEGER = 1,
CHARACTER = 2, STRING = 2,
VLOG_TIME = 3, VLOG_TIME = 3,
} type; } type;
// STRING type // LITERAL type
std::string str; std::string str;
// INTEGER/CHARACTER types // INTEGER/STRING types
RTLIL::SigSpec sig; RTLIL::SigSpec sig;
// INTEGER/CHARACTER/VLOG_TIME types // INTEGER/STRING/VLOG_TIME types
enum { enum {
RIGHT = 0, RIGHT = 0,
LEFT = 1, LEFT = 1,
@ -86,7 +86,7 @@ struct Fmt {
public: public:
std::vector<FmtPart> parts; std::vector<FmtPart> parts;
void append_string(const std::string &str); void append_literal(const std::string &str);
void parse_rtlil(const RTLIL::Cell *cell); void parse_rtlil(const RTLIL::Cell *cell);
void emit_rtlil(RTLIL::Cell *cell) const; void emit_rtlil(RTLIL::Cell *cell) const;