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https://github.com/YosysHQ/yosys
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smtbmc: Improvements for --incremental and .yw fixes
This extends the experimental incremental JSON API to allow arbitrary smtlib subexpressions, defining smtlib constants and to allow access of signals by their .yw path. It also fixes a bug during .yw writing where values would be re-emitted in later cycles if they have no newer defined value and a potential crash when using --track-assumes.
This commit is contained in:
Jannis Harder
parent
71f2540cd8
commit
a52088b6af
3 changed files with 284 additions and 97 deletions
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@ -199,7 +199,6 @@ def help():
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--minimize-assumes
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when using --track-assumes, solve for a minimal set of sufficient assumptions.
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""" + so.helpmsg())
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def usage():
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@ -670,18 +669,12 @@ if aimfile is not None:
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ywfile_hierwitness_cache = None
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def ywfile_constraints(inywfile, constr_assumes, map_steps=None, skip_x=False):
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def ywfile_hierwitness():
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global ywfile_hierwitness_cache
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if map_steps is None:
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map_steps = {}
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if ywfile_hierwitness_cache is None:
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ywfile_hierwitness = smt.hierwitness(topmod, allregs=True, blackbox=True)
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with open(inywfile, "r") as f:
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inyw = ReadWitness(f)
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if ywfile_hierwitness_cache is None:
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ywfile_hierwitness_cache = smt.hierwitness(topmod, allregs=True, blackbox=True)
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inits, seqs, clocks, mems = ywfile_hierwitness_cache
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inits, seqs, clocks, mems = ywfile_hierwitness
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smt_wires = defaultdict(list)
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smt_mems = defaultdict(list)
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@ -692,9 +685,128 @@ def ywfile_constraints(inywfile, constr_assumes, map_steps=None, skip_x=False):
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for mem in mems:
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smt_mems[mem["path"]].append(mem)
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addr_re = re.compile(r'\\\[[0-9]+\]$')
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bits_re = re.compile(r'[01?]*$')
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ywfile_hierwitness_cache = inits, seqs, clocks, mems, smt_wires, smt_mems
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return ywfile_hierwitness_cache
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def_bits_re = re.compile(r'([01]+)')
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def smt_extract_mask(smt_expr, mask):
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chunks = []
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def_bits = ''
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mask_index_order = mask[::-1]
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for matched in def_bits_re.finditer(mask_index_order):
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chunks.append(matched.span())
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def_bits += matched[0]
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if not chunks:
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return
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if len(chunks) == 1:
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start, end = chunks[0]
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if start == 0 and end == len(mask_index_order):
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combined_chunks = smt_expr
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else:
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combined_chunks = '((_ extract %d %d) %s)' % (end - 1, start, smt_expr)
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else:
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combined_chunks = '(let ((x %s)) (concat %s))' % (smt_expr, ' '.join(
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'((_ extract %d %d) x)' % (end - 1, start)
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for start, end in reversed(chunks)
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))
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return combined_chunks, ''.join(mask_index_order[start:end] for start, end in chunks)[::-1]
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def smt_concat(exprs):
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if not exprs:
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return ""
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if len(exprs) == 1:
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return exprs[1]
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return "(concat %s)" % ' '.join(exprs)
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def ywfile_signal(sig, step, mask=None):
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assert sig.width > 0
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inits, seqs, clocks, mems, smt_wires, smt_mems = ywfile_hierwitness()
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sig_end = sig.offset + sig.width
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output = []
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if sig.path in smt_wires:
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for wire in smt_wires[sig.path]:
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width, offset = wire["width"], wire["offset"]
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smt_bool = smt.net_width(topmod, wire["smtpath"]) == 1
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offset = max(offset, 0)
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end = width + offset
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common_offset = max(sig.offset, offset)
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common_end = min(sig_end, end)
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if common_end <= common_offset:
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continue
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smt_expr = smt.witness_net_expr(topmod, f"s{step}", wire)
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if not smt_bool:
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slice_high = common_end - offset - 1
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slice_low = common_offset - offset
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smt_expr = "((_ extract %d %d) %s)" % (slice_high, slice_low, smt_expr)
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else:
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smt_expr = "(ite %s #b1 #b0)" % smt_expr
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output.append(((common_offset - sig.offset), (common_end - sig.offset), smt_expr))
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if sig.memory_path:
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if sig.memory_path in smt_mems:
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for mem in smt_mems[sig.memory_path]:
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width, size, bv = mem["width"], mem["size"], mem["statebv"]
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smt_expr = smt.net_expr(topmod, f"s{step}", mem["smtpath"])
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if bv:
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word_low = sig.memory_addr * width
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word_high = word_low + width - 1
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smt_expr = "((_ extract %d %d) %s)" % (word_high, word_low, smt_expr)
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else:
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addr_width = (size - 1).bit_length()
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addr_bits = f"{sig.memory_addr:0{addr_width}b}"
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smt_expr = "(select %s #b%s )" % (smt_expr, addr_bits)
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if sig.width < width:
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slice_high = sig.offset + sig.width - 1
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smt_expr = "((_ extract %d %d) %s)" % (slice_high, sig.offset, smt_expr)
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output.append((0, sig.width, smt_expr))
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output.sort()
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output = [chunk for chunk in output if chunk[0] != chunk[1]]
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pos = 0
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for start, end, smt_expr in output:
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assert start == pos
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pos = end
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assert pos == sig.width
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if len(output) == 1:
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return output[0][-1]
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return smt_concat(smt_expr for start, end, smt_expr in reversed(output))
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def ywfile_constraints(inywfile, constr_assumes, map_steps=None, skip_x=False):
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global ywfile_hierwitness_cache
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if map_steps is None:
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map_steps = {}
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with open(inywfile, "r") as f:
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inyw = ReadWitness(f)
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inits, seqs, clocks, mems, smt_wires, smt_mems = ywfile_hierwitness()
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bits_re = re.compile(r'[01?]*$')
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max_t = -1
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for t, step in inyw.steps():
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@ -706,77 +818,14 @@ def ywfile_constraints(inywfile, constr_assumes, map_steps=None, skip_x=False):
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if not bits_re.match(bits):
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raise ValueError("unsupported bit value in Yosys witness file")
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sig_end = sig.offset + len(bits)
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if sig.path in smt_wires:
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for wire in smt_wires[sig.path]:
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width, offset = wire["width"], wire["offset"]
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smt_expr = ywfile_signal(sig, map_steps.get(t, t))
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smt_bool = smt.net_width(topmod, wire["smtpath"]) == 1
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smt_expr, bits = smt_extract_mask(smt_expr, bits)
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offset = max(offset, 0)
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smt_constr = "(= %s #b%s)" % (smt_expr, bits)
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constr_assumes[t].append((inywfile, smt_constr))
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end = width + offset
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common_offset = max(sig.offset, offset)
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common_end = min(sig_end, end)
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if common_end <= common_offset:
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continue
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smt_expr = smt.witness_net_expr(topmod, f"s{map_steps.get(t, t)}", wire)
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if not smt_bool:
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slice_high = common_end - offset - 1
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slice_low = common_offset - offset
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smt_expr = "((_ extract %d %d) %s)" % (slice_high, slice_low, smt_expr)
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bit_slice = bits[len(bits) - (common_end - sig.offset):len(bits) - (common_offset - sig.offset)]
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if bit_slice.count("?") == len(bit_slice):
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continue
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if smt_bool:
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assert width == 1
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smt_constr = "(= %s %s)" % (smt_expr, "true" if bit_slice == "1" else "false")
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else:
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if "?" in bit_slice:
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mask = bit_slice.replace("0", "1").replace("?", "0")
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bit_slice = bit_slice.replace("?", "0")
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smt_expr = "(bvand %s #b%s)" % (smt_expr, mask)
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smt_constr = "(= %s #b%s)" % (smt_expr, bit_slice)
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constr_assumes[t].append((inywfile, smt_constr))
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if sig.memory_path:
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if sig.memory_path in smt_mems:
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for mem in smt_mems[sig.memory_path]:
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width, size, bv = mem["width"], mem["size"], mem["statebv"]
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smt_expr = smt.net_expr(topmod, f"s{map_steps.get(t, t)}", mem["smtpath"])
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if bv:
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word_low = sig.memory_addr * width
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word_high = word_low + width - 1
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smt_expr = "((_ extract %d %d) %s)" % (word_high, word_low, smt_expr)
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else:
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addr_width = (size - 1).bit_length()
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addr_bits = f"{sig.memory_addr:0{addr_width}b}"
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smt_expr = "(select %s #b%s )" % (smt_expr, addr_bits)
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if len(bits) < width:
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slice_high = sig.offset + len(bits) - 1
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smt_expr = "((_ extract %d %d) %s)" % (slice_high, sig.offset, smt_expr)
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bit_slice = bits
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if "?" in bit_slice:
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mask = bit_slice.replace("0", "1").replace("?", "0")
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bit_slice = bit_slice.replace("?", "0")
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smt_expr = "(bvand %s #b%s)" % (smt_expr, mask)
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smt_constr = "(= %s #b%s)" % (smt_expr, bit_slice)
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constr_assumes[t].append((inywfile, smt_constr))
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max_t = t
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return max_t
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if inywfile is not None:
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@ -1367,11 +1416,11 @@ def write_yw_trace(steps, index, allregs=False, filename=None):
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exprs.extend(smt.witness_net_expr(topmod, f"s{k}", sig) for sig in sigs)
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all_sigs.append(sigs)
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all_sigs.append((step_values, sigs))
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bvs = iter(smt.get_list(exprs))
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for sigs in all_sigs:
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for (step_values, sigs) in all_sigs:
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for sig in sigs:
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value = smt.bv2bin(next(bvs))
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step_values[sig["sig"]] = value
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