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https://github.com/YosysHQ/yosys
synced 2025-09-11 20:21:26 +00:00
Make Const::is_*() functions work on packed bits without decaying to vector<State>
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9c96e61e9b
commit
a515055be4
2 changed files with 120 additions and 15 deletions
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@ -632,10 +632,17 @@ RTLIL::State RTLIL::Const::const_iterator::operator*() const {
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bool RTLIL::Const::is_fully_zero() const
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{
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bitvectorize_internal();
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bitvectype& bv = get_bits();
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cover("kernel.rtlil.const.is_fully_zero");
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if (auto str = get_if_str()) {
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for (char ch : *str)
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if (ch != 0)
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return false;
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return true;
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}
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bitvectype& bv = get_bits();
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for (const auto &bit : bv)
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if (bit != RTLIL::State::S0)
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return false;
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@ -645,10 +652,16 @@ bool RTLIL::Const::is_fully_zero() const
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bool RTLIL::Const::is_fully_ones() const
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{
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bitvectorize_internal();
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bitvectype& bv = get_bits();
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cover("kernel.rtlil.const.is_fully_ones");
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if (auto str = get_if_str()) {
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for (char ch : *str)
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if (ch != (char)0xff)
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return false;
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return true;
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}
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bitvectype& bv = get_bits();
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for (const auto &bit : bv)
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if (bit != RTLIL::State::S1)
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return false;
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@ -660,9 +673,10 @@ bool RTLIL::Const::is_fully_def() const
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{
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cover("kernel.rtlil.const.is_fully_def");
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bitvectorize_internal();
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bitvectype& bv = get_bits();
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if (is_str())
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return true;
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bitvectype& bv = get_bits();
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for (const auto &bit : bv)
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if (bit != RTLIL::State::S0 && bit != RTLIL::State::S1)
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return false;
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@ -674,9 +688,10 @@ bool RTLIL::Const::is_fully_undef() const
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{
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cover("kernel.rtlil.const.is_fully_undef");
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bitvectorize_internal();
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bitvectype& bv = get_bits();
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if (auto str = get_if_str())
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return str->empty();
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bitvectype& bv = get_bits();
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for (const auto &bit : bv)
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if (bit != RTLIL::State::Sx && bit != RTLIL::State::Sz)
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return false;
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@ -688,9 +703,10 @@ bool RTLIL::Const::is_fully_undef_x_only() const
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{
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cover("kernel.rtlil.const.is_fully_undef_x_only");
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bitvectorize_internal();
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bitvectype& bv = get_bits();
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if (auto str = get_if_str())
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return str->empty();
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bitvectype& bv = get_bits();
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for (const auto &bit : bv)
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if (bit != RTLIL::State::Sx)
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return false;
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@ -702,12 +718,10 @@ bool RTLIL::Const::is_onehot(int *pos) const
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{
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cover("kernel.rtlil.const.is_onehot");
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bitvectorize_internal();
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bitvectype& bv = get_bits();
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bool found = false;
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for (int i = 0; i < GetSize(*this); i++) {
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auto &bit = bv[i];
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int size = GetSize(*this);
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for (int i = 0; i < size; i++) {
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State bit = (*this)[i];
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if (bit != RTLIL::State::S0 && bit != RTLIL::State::S1)
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return false;
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if (bit == RTLIL::State::S1) {
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@ -157,6 +157,50 @@ namespace RTLIL {
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Const c(v);
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EXPECT_EQ(c.decode_string(), " ");
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}
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{
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Const c(" ");
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EXPECT_TRUE(c.is_str());
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EXPECT_FALSE(c.is_fully_zero());
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EXPECT_TRUE(c.is_str());
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}
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{
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Const c(" ");
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EXPECT_TRUE(c.is_str());
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EXPECT_FALSE(c.is_fully_ones());
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EXPECT_TRUE(c.is_str());
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}
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{
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Const c(" ");
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EXPECT_TRUE(c.is_str());
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EXPECT_TRUE(c.is_fully_def());
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EXPECT_TRUE(c.is_str());
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}
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{
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Const c(" ");
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EXPECT_TRUE(c.is_str());
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EXPECT_FALSE(c.is_fully_undef());
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EXPECT_TRUE(c.is_str());
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}
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{
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Const c(" ");
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EXPECT_TRUE(c.is_str());
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EXPECT_FALSE(c.is_fully_undef_x_only());
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EXPECT_TRUE(c.is_str());
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}
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{
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Const c(" ");
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EXPECT_TRUE(c.is_str());
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int pos;
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EXPECT_TRUE(c.is_onehot(&pos));
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EXPECT_EQ(pos, 5);
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EXPECT_TRUE(c.is_str());
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}
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}
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TEST_F(KernelRtlilTest, ConstConstIteratorWorks) {
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@ -267,6 +311,53 @@ namespace RTLIL {
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EXPECT_NE(hash(Const(v1)), hash(Const("a")));
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}
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TEST_F(KernelRtlilTest, ConstIsFullyZero) {
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EXPECT_TRUE(Const(0, 8).is_fully_zero());
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EXPECT_FALSE(Const(8, 8).is_fully_zero());
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EXPECT_TRUE(Const().is_fully_zero());
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}
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TEST_F(KernelRtlilTest, ConstIsFullyOnes) {
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EXPECT_TRUE(Const(0xf, 4).is_fully_ones());
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EXPECT_FALSE(Const(3, 4).is_fully_ones());
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EXPECT_TRUE(Const().is_fully_ones());
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}
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TEST_F(KernelRtlilTest, ConstIsFullyDef) {
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EXPECT_TRUE(Const(0xf, 4).is_fully_def());
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std::vector<State> v1 = {S0, Sx};
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EXPECT_FALSE(Const(v1).is_fully_def());
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EXPECT_TRUE(Const().is_fully_def());
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}
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TEST_F(KernelRtlilTest, ConstIsFullyUndef) {
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std::vector<State> v1 = {S0, Sx};
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EXPECT_FALSE(Const(v1).is_fully_undef());
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EXPECT_TRUE(Const(Sz, 2).is_fully_undef());
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EXPECT_TRUE(Const().is_fully_undef());
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}
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TEST_F(KernelRtlilTest, ConstIsFullyUndefXOnly) {
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std::vector<State> v1 = {Sx, Sz};
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EXPECT_FALSE(Const(v1).is_fully_undef_x_only());
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EXPECT_TRUE(Const(Sx, 2).is_fully_undef_x_only());
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EXPECT_TRUE(Const().is_fully_undef_x_only());
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}
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TEST_F(KernelRtlilTest, ConstIsOnehot) {
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int pos;
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EXPECT_TRUE(Const(0x80, 8).is_onehot(&pos));
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EXPECT_EQ(pos, 7);
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EXPECT_FALSE(Const(0x82, 8).is_onehot(&pos));
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EXPECT_FALSE(Const(0, 8).is_onehot(&pos));
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EXPECT_TRUE(Const(1, 1).is_onehot(&pos));
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EXPECT_EQ(pos, 0);
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EXPECT_FALSE(Const(Sx, 1).is_onehot(&pos));
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std::vector<State> v1 = {Sx, S1};
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EXPECT_FALSE(Const(v1).is_onehot(&pos));
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EXPECT_FALSE(Const().is_onehot(&pos));
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}
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class WireRtlVsHdlIndexConversionTest :
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public KernelRtlilTest,
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public testing::WithParamInterface<std::tuple<bool, int, int>>
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