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https://github.com/YosysHQ/yosys
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Implemented celltype lookups.
This commit is contained in:
nella
parent
ac96f318ef
commit
a4d998d6cd
4 changed files with 727 additions and 246 deletions
579
misc/gen_celltypes.py
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579
misc/gen_celltypes.py
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#!/usr/bin/env python3
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"""
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Generate pre-computed static cell type tables. Outputs:
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kernel/gen_celltypes_data.h
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kernel/gen_celltypes_data.cc
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"""
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import os
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import re
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import sys
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from dataclasses import dataclass
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MAX_CELLS = 300
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MAX_PORTS = 20
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# Build the IdString index map
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def parse_constids(filepath):
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index_map = {}
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index = 1 # 0 is reserved for empty IdString
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with open(filepath, "r") as f:
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for line in f:
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line = line.strip()
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m = re.match(r"^X\((\S+)\)$", line)
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if m:
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name = m.group(1)
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index_map[name] = index
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index += 1
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return index_map
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def resolve_id(index_map, name):
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"""Resolve a name (e.g. '$and', 'A', '$_BUF_') to its constids index."""
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if name not in index_map:
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raise KeyError(f"ID '{name}' not found in constids.inc")
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return index_map[name]
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# Cell type table builder
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@dataclass
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class Features:
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is_evaluable: bool = False
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is_combinatorial: bool = False
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is_synthesizable: bool = False
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is_stdcell: bool = False
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is_ff: bool = False
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is_mem_noff: bool = False
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is_anyinit: bool = False
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is_tristate: bool = False
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@dataclass
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class CellInfo:
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type_name: str
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inputs: list
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outputs: list
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features: Features
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def build_cell_table():
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cells = []
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def setup_type(type_name, inputs, outputs, features):
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cells.append(CellInfo(type_name, list(inputs), list(outputs),
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Features(**vars(features))))
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# setup_internals_other
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f = Features(is_tristate=True)
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setup_type("$tribuf", ["A", "EN"], ["Y"], f)
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f = Features()
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setup_type("$assert", ["A", "EN"], [], f)
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setup_type("$assume", ["A", "EN"], [], f)
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setup_type("$live", ["A", "EN"], [], f)
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setup_type("$fair", ["A", "EN"], [], f)
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setup_type("$cover", ["A", "EN"], [], f)
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setup_type("$initstate", [], ["Y"], f)
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setup_type("$anyconst", [], ["Y"], f)
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setup_type("$anyseq", [], ["Y"], f)
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setup_type("$allconst", [], ["Y"], f)
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setup_type("$allseq", [], ["Y"], f)
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setup_type("$equiv", ["A", "B"], ["Y"], f)
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setup_type("$specify2", ["EN", "SRC", "DST"], [], f)
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setup_type("$specify3", ["EN", "SRC", "DST", "DAT"], [], f)
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setup_type("$specrule", ["EN_SRC", "EN_DST", "SRC", "DST"], [], f)
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setup_type("$print", ["EN", "ARGS", "TRG"], [], f)
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setup_type("$check", ["A", "EN", "ARGS", "TRG"], [], f)
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setup_type("$set_tag", ["A", "SET", "CLR"], ["Y"], f)
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setup_type("$get_tag", ["A"], ["Y"], f)
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setup_type("$overwrite_tag", ["A", "SET", "CLR"], [], f)
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setup_type("$original_tag", ["A"], ["Y"], f)
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setup_type("$future_ff", ["A"], ["Y"], f)
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setup_type("$scopeinfo", [], [], f)
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setup_type("$input_port", [], ["Y"], f)
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setup_type("$connect", ["A", "B"], [], f)
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# setup_internals_eval
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f = Features(is_evaluable=True)
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unary_ops = [
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"$not", "$pos", "$buf", "$neg",
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"$reduce_and", "$reduce_or", "$reduce_xor", "$reduce_xnor",
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"$reduce_bool",
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"$logic_not", "$slice", "$lut", "$sop",
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]
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binary_ops = [
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"$and", "$or", "$xor", "$xnor",
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"$shl", "$shr", "$sshl", "$sshr", "$shift", "$shiftx",
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"$lt", "$le", "$eq", "$ne", "$eqx", "$nex", "$ge", "$gt",
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"$add", "$sub", "$mul", "$div", "$mod", "$divfloor", "$modfloor",
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"$pow",
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"$logic_and", "$logic_or", "$concat", "$macc",
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"$bweqx",
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]
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for t in unary_ops:
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setup_type(t, ["A"], ["Y"], f)
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for t in binary_ops:
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setup_type(t, ["A", "B"], ["Y"], f)
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for t in ["$mux", "$pmux", "$bwmux"]:
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setup_type(t, ["A", "B", "S"], ["Y"], f)
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for t in ["$bmux", "$demux"]:
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setup_type(t, ["A", "S"], ["Y"], f)
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setup_type("$lcu", ["P", "G", "CI"], ["CO"], f)
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setup_type("$alu", ["A", "B", "CI", "BI"], ["X", "Y", "CO"], f)
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setup_type("$macc_v2", ["A", "B", "C"], ["Y"], f)
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setup_type("$fa", ["A", "B", "C"], ["X", "Y"], f)
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# setup_internals_ff
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f = Features(is_ff=True)
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setup_type("$sr", ["SET", "CLR"], ["Q"], f)
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setup_type("$ff", ["D"], ["Q"], f)
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setup_type("$dff", ["CLK", "D"], ["Q"], f)
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setup_type("$dffe", ["CLK", "EN", "D"], ["Q"], f)
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setup_type("$dffsr", ["CLK", "SET", "CLR", "D"], ["Q"], f)
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setup_type("$dffsre", ["CLK", "SET", "CLR", "D", "EN"], ["Q"], f)
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setup_type("$adff", ["CLK", "ARST", "D"], ["Q"], f)
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setup_type("$adffe", ["CLK", "ARST", "D", "EN"], ["Q"], f)
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setup_type("$aldff", ["CLK", "ALOAD", "AD", "D"], ["Q"], f)
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setup_type("$aldffe", ["CLK", "ALOAD", "AD", "D", "EN"], ["Q"], f)
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setup_type("$sdff", ["CLK", "SRST", "D"], ["Q"], f)
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setup_type("$sdffe", ["CLK", "SRST", "D", "EN"], ["Q"], f)
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setup_type("$sdffce", ["CLK", "SRST", "D", "EN"], ["Q"], f)
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setup_type("$dlatch", ["EN", "D"], ["Q"], f)
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setup_type("$adlatch", ["EN", "D", "ARST"], ["Q"], f)
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setup_type("$dlatchsr", ["EN", "SET", "CLR", "D"], ["Q"], f)
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# setup_internals_anyinit
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f = Features(is_anyinit=True)
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setup_type("$anyinit", ["D"], ["Q"], f)
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# setup_internals_mem_noff
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f = Features(is_mem_noff=True)
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setup_type("$memrd", ["CLK", "EN", "ADDR"], ["DATA"], f)
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setup_type("$memrd_v2", ["CLK", "EN", "ARST", "SRST", "ADDR"],
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["DATA"], f)
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setup_type("$memwr", ["CLK", "EN", "ADDR", "DATA"], [], f)
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setup_type("$memwr_v2", ["CLK", "EN", "ADDR", "DATA"], [], f)
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setup_type("$meminit", ["ADDR", "DATA"], [], f)
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setup_type("$meminit_v2", ["ADDR", "DATA", "EN"], [], f)
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setup_type("$mem",
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["RD_CLK", "RD_EN", "RD_ADDR",
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"WR_CLK", "WR_EN", "WR_ADDR", "WR_DATA"],
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["RD_DATA"], f)
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setup_type("$mem_v2",
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["RD_CLK", "RD_EN", "RD_ARST", "RD_SRST", "RD_ADDR",
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"WR_CLK", "WR_EN", "WR_ADDR", "WR_DATA"],
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["RD_DATA"], f)
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setup_type("$fsm", ["CLK", "ARST", "CTRL_IN"], ["CTRL_OUT"], f)
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# setup_stdcells_tristate
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f = Features(is_stdcell=True, is_tristate=True)
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setup_type("$_TBUF_", ["A", "E"], ["Y"], f)
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# setup_stdcells_eval
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f = Features(is_stdcell=True, is_evaluable=True)
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setup_type("$_BUF_", ["A"], ["Y"], f)
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setup_type("$_NOT_", ["A"], ["Y"], f)
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setup_type("$_AND_", ["A", "B"], ["Y"], f)
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setup_type("$_NAND_", ["A", "B"], ["Y"], f)
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setup_type("$_OR_", ["A", "B"], ["Y"], f)
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setup_type("$_NOR_", ["A", "B"], ["Y"], f)
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setup_type("$_XOR_", ["A", "B"], ["Y"], f)
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setup_type("$_XNOR_", ["A", "B"], ["Y"], f)
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setup_type("$_ANDNOT_", ["A", "B"], ["Y"], f)
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setup_type("$_ORNOT_", ["A", "B"], ["Y"], f)
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setup_type("$_MUX_", ["A", "B", "S"], ["Y"], f)
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setup_type("$_NMUX_", ["A", "B", "S"], ["Y"], f)
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setup_type("$_MUX4_", ["A", "B", "C", "D", "S", "T"], ["Y"], f)
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setup_type("$_MUX8_",
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["A", "B", "C", "D", "E", "F", "G", "H", "S", "T", "U"],
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["Y"], f)
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setup_type("$_MUX16_",
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["A", "B", "C", "D", "E", "F", "G", "H",
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"I", "J", "K", "L", "M", "N", "O", "P",
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"S", "T", "U", "V"],
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["Y"], f)
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setup_type("$_AOI3_", ["A", "B", "C"], ["Y"], f)
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setup_type("$_OAI3_", ["A", "B", "C"], ["Y"], f)
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setup_type("$_AOI4_", ["A", "B", "C", "D"], ["Y"], f)
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setup_type("$_OAI4_", ["A", "B", "C", "D"], ["Y"], f)
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# setup_stdcells_ff
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f = Features(is_stdcell=True, is_ff=True)
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NP = ["N", "P"]
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ZO = ["0", "1"]
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for c1 in NP:
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for c2 in NP:
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setup_type(f"$_SR_{c1}{c2}_", ["S", "R"], ["Q"], f)
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setup_type("$_FF_", ["D"], ["Q"], f)
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for c1 in NP:
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setup_type(f"$_DFF_{c1}_", ["C", "D"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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setup_type(f"$_DFFE_{c1}{c2}_", ["C", "D", "E"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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for c3 in ZO:
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setup_type(f"$_DFF_{c1}{c2}{c3}_",
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["C", "R", "D"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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for c3 in ZO:
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for c4 in NP:
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setup_type(f"$_DFFE_{c1}{c2}{c3}{c4}_",
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["C", "R", "D", "E"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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setup_type(f"$_ALDFF_{c1}{c2}_",
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["C", "L", "AD", "D"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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for c3 in NP:
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setup_type(f"$_ALDFFE_{c1}{c2}{c3}_",
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["C", "L", "AD", "D", "E"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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for c3 in NP:
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setup_type(f"$_DFFSR_{c1}{c2}{c3}_",
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["C", "S", "R", "D"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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for c3 in NP:
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for c4 in NP:
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setup_type(f"$_DFFSRE_{c1}{c2}{c3}{c4}_",
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["C", "S", "R", "D", "E"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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for c3 in ZO:
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setup_type(f"$_SDFF_{c1}{c2}{c3}_",
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["C", "R", "D"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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for c3 in ZO:
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for c4 in NP:
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setup_type(f"$_SDFFE_{c1}{c2}{c3}{c4}_",
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["C", "R", "D", "E"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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for c3 in ZO:
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for c4 in NP:
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setup_type(f"$_SDFFCE_{c1}{c2}{c3}{c4}_",
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["C", "R", "D", "E"], ["Q"], f)
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for c1 in NP:
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setup_type(f"$_DLATCH_{c1}_", ["E", "D"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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for c3 in ZO:
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setup_type(f"$_DLATCH_{c1}{c2}{c3}_",
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["E", "R", "D"], ["Q"], f)
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for c1 in NP:
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for c2 in NP:
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for c3 in NP:
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setup_type(f"$_DLATCHSR_{c1}{c2}{c3}_",
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["E", "S", "R", "D"], ["Q"], f)
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return cells
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def build_arrays(cells, index_map):
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cats = {
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"is_known": [0] * MAX_CELLS,
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"is_evaluable": [0] * MAX_CELLS,
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"is_combinatorial": [0] * MAX_CELLS,
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"is_synthesizable": [0] * MAX_CELLS,
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"is_stdcell": [0] * MAX_CELLS,
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"is_ff": [0] * MAX_CELLS,
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"is_mem_noff": [0] * MAX_CELLS,
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"is_anyinit": [0] * MAX_CELLS,
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"is_tristate": [0] * MAX_CELLS,
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}
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input_counts = [0] * MAX_CELLS
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input_ports = [[0] * MAX_PORTS for _ in range(MAX_CELLS)]
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output_counts = [0] * MAX_CELLS
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output_ports = [[0] * MAX_PORTS for _ in range(MAX_CELLS)]
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for cell in cells:
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idx = resolve_id(index_map, cell.type_name)
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if idx >= MAX_CELLS:
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print(f"WARNING: '{cell.type_name}' index {idx} >= MAX_CELLS "
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f"({MAX_CELLS}), increase MAX_CELLS", file=sys.stderr)
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continue
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cats["is_known"][idx] = 1
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for feat in ["is_evaluable", "is_combinatorial", "is_synthesizable",
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"is_stdcell", "is_ff", "is_mem_noff", "is_anyinit",
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"is_tristate"]:
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if getattr(cell.features, feat):
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cats[feat][idx] = 1
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input_counts[idx] = len(cell.inputs)
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for j, port in enumerate(cell.inputs):
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input_ports[idx][j] = resolve_id(index_map, port)
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output_counts[idx] = len(cell.outputs)
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for j, port in enumerate(cell.outputs):
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output_ports[idx][j] = resolve_id(index_map, port)
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# Compat derived categories
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def bor(a, b):
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return [int(a[i] or b[i]) for i in range(MAX_CELLS)]
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def band(a, b):
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return [int(a[i] and b[i]) for i in range(MAX_CELLS)]
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def bnot(a):
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return [int(not a[i]) for i in range(MAX_CELLS)]
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mem_ff = bor(cats["is_ff"], cats["is_mem_noff"])
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internals_all = band(cats["is_known"], bnot(cats["is_stdcell"]))
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nomem_noff = band(cats["is_known"], bnot(mem_ff))
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compat = {
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"compat_internals_all": internals_all,
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"compat_mem_ff": mem_ff,
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"compat_nomem_noff": nomem_noff,
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"compat_internals_mem_ff": band(internals_all, mem_ff),
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"compat_internals_nomem_noff": band(internals_all, nomem_noff),
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"compat_stdcells_nomem_noff": band(cats["is_stdcell"], nomem_noff),
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"compat_stdcells_mem": band(cats["is_stdcell"], cats["is_mem_noff"]),
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}
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return (cats, compat,
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input_counts, input_ports, output_counts, output_ports)
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def fmt_u8(name, data):
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lines = [f"const uint8_t {name}[{MAX_CELLS}] = {{"]
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for i in range(0, MAX_CELLS, 25):
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chunk = data[i:i + 25]
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lines.append(" " + ",".join(str(v) for v in chunk) + ",")
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lines.append("};")
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return "\n".join(lines)
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def fmt_u16(name, data):
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lines = [f"const uint16_t {name}[{MAX_CELLS}] = {{"]
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for i in range(0, MAX_CELLS, 25):
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chunk = data[i:i + 25]
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lines.append(" " + ",".join(str(v) for v in chunk) + ",")
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lines.append("};")
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return "\n".join(lines)
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def fmt_u32_2d(name, data):
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lines = [f"const uint32_t {name}[{MAX_CELLS}][{MAX_PORTS}] = {{"]
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for i in range(MAX_CELLS):
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lines.append(" {" + ",".join(str(v) for v in data[i]) + "},")
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lines.append("};")
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return "\n".join(lines)
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def generate_cc(cats, compat, in_c, in_p, out_c, out_p):
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parts = [
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"// AUTO-GENERATED FILE - DO NOT EDIT",
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"// Generated by misc/gen_celltypes.py from kernel/constids.inc",
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"// Source of truth for cell definitions: misc/gen_celltypes.py",
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||||
"//",
|
||||
"// Regenerate with: make kernel/gen_celltypes_data.cc",
|
||||
"",
|
||||
'#include "kernel/gen_celltypes_data.h"',
|
||||
"",
|
||||
"YOSYS_NAMESPACE_BEGIN",
|
||||
"namespace StaticCellTypes {",
|
||||
"namespace GeneratedData {",
|
||||
"",
|
||||
]
|
||||
|
||||
for name, data in cats.items():
|
||||
parts.append(fmt_u8(name, data))
|
||||
parts.append("")
|
||||
|
||||
for name, data in compat.items():
|
||||
parts.append(fmt_u8(name, data))
|
||||
parts.append("")
|
||||
|
||||
parts.append(fmt_u16("port_inputs_counts", in_c))
|
||||
parts.append("")
|
||||
parts.append(fmt_u32_2d("port_inputs_ports", in_p))
|
||||
parts.append("")
|
||||
parts.append(fmt_u16("port_outputs_counts", out_c))
|
||||
parts.append("")
|
||||
parts.append(fmt_u32_2d("port_outputs_ports", out_p))
|
||||
parts.append("")
|
||||
|
||||
parts.extend([
|
||||
"} // namespace GeneratedData",
|
||||
"} // namespace StaticCellTypes",
|
||||
"YOSYS_NAMESPACE_END",
|
||||
"",
|
||||
])
|
||||
return "\n".join(parts)
|
||||
|
||||
|
||||
def generate_header():
|
||||
return f"""\
|
||||
// AUTO-GENERATED FILE - DO NOT EDIT
|
||||
// Generated by misc/gen_celltypes.py from kernel/constids.inc
|
||||
// Regenerate with: make kernel/gen_celltypes_data.cc
|
||||
|
||||
#ifndef GEN_CELLTYPES_DATA_H
|
||||
#define GEN_CELLTYPES_DATA_H
|
||||
|
||||
#include "kernel/yosys.h"
|
||||
#include <cstdint>
|
||||
|
||||
YOSYS_NAMESPACE_BEGIN
|
||||
namespace StaticCellTypes {{
|
||||
|
||||
constexpr int GEN_MAX_CELLS = {MAX_CELLS};
|
||||
constexpr int GEN_MAX_PORTS = {MAX_PORTS};
|
||||
|
||||
namespace GeneratedData {{
|
||||
|
||||
extern const uint8_t is_known[GEN_MAX_CELLS];
|
||||
extern const uint8_t is_evaluable[GEN_MAX_CELLS];
|
||||
extern const uint8_t is_combinatorial[GEN_MAX_CELLS];
|
||||
extern const uint8_t is_synthesizable[GEN_MAX_CELLS];
|
||||
extern const uint8_t is_stdcell[GEN_MAX_CELLS];
|
||||
extern const uint8_t is_ff[GEN_MAX_CELLS];
|
||||
extern const uint8_t is_mem_noff[GEN_MAX_CELLS];
|
||||
extern const uint8_t is_anyinit[GEN_MAX_CELLS];
|
||||
extern const uint8_t is_tristate[GEN_MAX_CELLS];
|
||||
|
||||
extern const uint8_t compat_internals_all[GEN_MAX_CELLS];
|
||||
extern const uint8_t compat_mem_ff[GEN_MAX_CELLS];
|
||||
extern const uint8_t compat_nomem_noff[GEN_MAX_CELLS];
|
||||
extern const uint8_t compat_internals_mem_ff[GEN_MAX_CELLS];
|
||||
extern const uint8_t compat_internals_nomem_noff[GEN_MAX_CELLS];
|
||||
extern const uint8_t compat_stdcells_nomem_noff[GEN_MAX_CELLS];
|
||||
extern const uint8_t compat_stdcells_mem[GEN_MAX_CELLS];
|
||||
|
||||
extern const uint16_t port_inputs_counts[GEN_MAX_CELLS];
|
||||
extern const uint32_t port_inputs_ports[GEN_MAX_CELLS][GEN_MAX_PORTS];
|
||||
extern const uint16_t port_outputs_counts[GEN_MAX_CELLS];
|
||||
extern const uint32_t port_outputs_ports[GEN_MAX_CELLS][GEN_MAX_PORTS];
|
||||
|
||||
}} // namespace GeneratedData
|
||||
|
||||
struct GenCategory {{
|
||||
const uint8_t* data;
|
||||
bool operator()(RTLIL::IdString type) const {{
|
||||
size_t idx = type.index_;
|
||||
return idx < GEN_MAX_CELLS && data[idx];
|
||||
}}
|
||||
}};
|
||||
|
||||
struct GenPortLookup {{
|
||||
const uint16_t* counts;
|
||||
const uint32_t (*ports)[GEN_MAX_PORTS];
|
||||
|
||||
bool contains(RTLIL::IdString type, RTLIL::IdString port) const {{
|
||||
size_t idx = type.index_;
|
||||
if (idx >= GEN_MAX_CELLS)
|
||||
return false;
|
||||
uint16_t count = counts[idx];
|
||||
for (uint16_t i = 0; i < count; i++) {{
|
||||
if (ports[idx][i] == (uint32_t)port.index_)
|
||||
return true;
|
||||
}}
|
||||
return false;
|
||||
}}
|
||||
}};
|
||||
|
||||
inline GenCategory gen_is_known() {{ return {{GeneratedData::is_known}}; }}
|
||||
inline GenCategory gen_is_evaluable() {{ return {{GeneratedData::is_evaluable}}; }}
|
||||
inline GenCategory gen_is_combinatorial() {{ return {{GeneratedData::is_combinatorial}}; }}
|
||||
inline GenCategory gen_is_synthesizable() {{ return {{GeneratedData::is_synthesizable}}; }}
|
||||
inline GenCategory gen_is_stdcell() {{ return {{GeneratedData::is_stdcell}}; }}
|
||||
inline GenCategory gen_is_ff() {{ return {{GeneratedData::is_ff}}; }}
|
||||
inline GenCategory gen_is_mem_noff() {{ return {{GeneratedData::is_mem_noff}}; }}
|
||||
inline GenCategory gen_is_anyinit() {{ return {{GeneratedData::is_anyinit}}; }}
|
||||
inline GenCategory gen_is_tristate() {{ return {{GeneratedData::is_tristate}}; }}
|
||||
|
||||
inline GenCategory gen_compat_internals_all() {{ return {{GeneratedData::compat_internals_all}}; }}
|
||||
inline GenCategory gen_compat_mem_ff() {{ return {{GeneratedData::compat_mem_ff}}; }}
|
||||
inline GenCategory gen_compat_nomem_noff() {{ return {{GeneratedData::compat_nomem_noff}}; }}
|
||||
inline GenCategory gen_compat_internals_mem_ff() {{ return {{GeneratedData::compat_internals_mem_ff}}; }}
|
||||
inline GenCategory gen_compat_internals_nomem_noff() {{ return {{GeneratedData::compat_internals_nomem_noff}}; }}
|
||||
inline GenCategory gen_compat_stdcells_nomem_noff() {{ return {{GeneratedData::compat_stdcells_nomem_noff}}; }}
|
||||
inline GenCategory gen_compat_stdcells_mem() {{ return {{GeneratedData::compat_stdcells_mem}}; }}
|
||||
|
||||
inline GenPortLookup gen_port_inputs() {{
|
||||
return {{GeneratedData::port_inputs_counts, GeneratedData::port_inputs_ports}};
|
||||
}}
|
||||
|
||||
inline GenPortLookup gen_port_outputs() {{
|
||||
return {{GeneratedData::port_outputs_counts, GeneratedData::port_outputs_ports}};
|
||||
}}
|
||||
|
||||
}} // namespace StaticCellTypes
|
||||
YOSYS_NAMESPACE_END
|
||||
|
||||
#endif // GEN_CELLTYPES_DATA_H
|
||||
"""
|
||||
|
||||
|
||||
def main():
|
||||
if len(sys.argv) > 1:
|
||||
yosys_src = sys.argv[1]
|
||||
else:
|
||||
yosys_src = os.environ.get("YOSYS_SRC", ".")
|
||||
|
||||
constids_path = os.path.join(yosys_src, "kernel", "constids.inc")
|
||||
header_out = os.path.join(yosys_src, "kernel", "gen_celltypes_data.h")
|
||||
data_out = os.path.join(yosys_src, "kernel", "gen_celltypes_data.cc")
|
||||
|
||||
if not os.path.exists(constids_path):
|
||||
print(f"Error: {constids_path} not found.", file=sys.stderr)
|
||||
sys.exit(1)
|
||||
|
||||
# Parse
|
||||
print(f"Parsing {constids_path}...", file=sys.stderr)
|
||||
index_map = parse_constids(constids_path)
|
||||
print(f" {len(index_map)} IdString constants", file=sys.stderr)
|
||||
|
||||
# Build tables
|
||||
cells = build_cell_table()
|
||||
print(f" {len(cells)} cell types defined", file=sys.stderr)
|
||||
|
||||
try:
|
||||
result = build_arrays(cells, index_map)
|
||||
except KeyError as e:
|
||||
print(f"Error: {e}", file=sys.stderr)
|
||||
print(f" kernel/constids.inc may be missing entries.",
|
||||
file=sys.stderr)
|
||||
sys.exit(1)
|
||||
|
||||
cats, compat, in_c, in_p, out_c, out_p = result
|
||||
|
||||
# Write header
|
||||
with open(header_out, "w") as f:
|
||||
f.write(generate_header())
|
||||
print(f"Wrote {header_out}", file=sys.stderr)
|
||||
|
||||
# Write data
|
||||
with open(data_out, "w") as f:
|
||||
f.write(generate_cc(cats, compat, in_c, in_p, out_c, out_p))
|
||||
print(f"Wrote {data_out}", file=sys.stderr)
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
Loading…
Add table
Add a link
Reference in a new issue