mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-06 22:23:23 +00:00
Code Activity

Support missing xor-assign operator

Browse source 
Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
This commit is contained in:
Lukasz Dalek 2020-06-23 18:50:50 +02:00 • committed by Kamil Rakoczy
parent a5ca4eeefb
commit a4b4c22c96
2 changed files with 10 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

1
frontends/verilog/verilog_lexer.l
View file

@ -528,6 +528,7 @@ import[ \t\r\n]+\"(DPI|DPI-C)\"[ \t\r\n]+function[ \t\r\n]+ {
"|=" { SV_KEYWORD(TOK_OR_ASSIGN); }
"+=" { SV_KEYWORD(TOK_PLUS_ASSIGN); }
"^=" { SV_KEYWORD(TOK_XOR_ASSIGN); }
[-+]?[=*]> {
if (!specify_mode) REJECT;