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quicklogic: Add basic k6n10f tests
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39
tests/arch/quicklogic/qlf_k6n10f/mux.ys
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39
tests/arch/quicklogic/qlf_k6n10f/mux.ys
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read_verilog ../../common/mux.v
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design -save read
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hierarchy -top mux2
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proc
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equiv_opt -assert -map +/quicklogic/qlf_k6n10f/cells_sim.v -map +/quicklogic/common/cells_sim.v synth_quicklogic -family qlf_k6n10f # equivalency check
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd mux2 # Constrain all select calls below inside the top module
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select -assert-count 1 t:$lut r:WIDTH=3 %i
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select -assert-none t:$lut r:WIDTH=3 %i %% t:* %D
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design -load read
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hierarchy -top mux4
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proc
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equiv_opt -assert -map +/quicklogic/qlf_k6n10f/cells_sim.v -map +/quicklogic/common/cells_sim.v synth_quicklogic -family qlf_k6n10f # equivalency check
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd mux4 # Constrain all select calls below inside the top module
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select -assert-count 1 t:$lut r:WIDTH=6 %i
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select -assert-none t:$lut r:WIDTH=6 %i %% t:* %D
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design -load read
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hierarchy -top mux8
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proc
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equiv_opt -assert -map +/quicklogic/qlf_k6n10f/cells_sim.v -map +/quicklogic/common/cells_sim.v synth_quicklogic -family qlf_k6n10f # equivalency check
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd mux8 # Constrain all select calls below inside the top module
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select -assert-count 2 t:$lut r:WIDTH=6 %i
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select -assert-count 1 t:$lut r:WIDTH=3 %i
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select -assert-none t:$lut r:WIDTH=6 r:WIDTH=3 %u %i %% t:* %D
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design -load read
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hierarchy -top mux16
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proc
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equiv_opt -assert -map +/quicklogic/qlf_k6n10f/cells_sim.v -map +/quicklogic/common/cells_sim.v synth_quicklogic -family qlf_k6n10f # equivalency check
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd mux16 # Constrain all select calls below inside the top module
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select -assert-count 5 t:$lut r:WIDTH=6 %i # OOT flow does 2
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select -assert-count 0 t:$lut r:WIDTH=3 %i # and here 1
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select -assert-none t:$lut r:WIDTH=6 r:WIDTH=3 %u %i %% t:* %D
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