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WIP -chparam support for hierarchy when verific
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0f1a4cc03c
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3 changed files with 41 additions and 19 deletions
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@ -775,15 +775,16 @@ void VerificImporter::merge_past_ffs(pool<RTLIL::Cell*> &candidates)
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merge_past_ffs_clock(it.second, it.first.first, it.first.second);
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}
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void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::set<Netlist*> &nl_todo)
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void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::set<Netlist*> &nl_todo, bool top)
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{
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std::string module_name = nl->IsOperator() ? std::string("$verific$") + nl->Owner()->Name() : RTLIL::escape_id(nl->Owner()->Name());
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std::string netlist_name = top ? nl->CellBaseName() : nl->Owner()->Name();
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std::string module_name = nl->IsOperator() ? "$verific$" + netlist_name : RTLIL::escape_id(netlist_name);
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netlist = nl;
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if (design->has(module_name)) {
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if (!nl->IsOperator() && !is_blackbox(nl))
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log_cmd_error("Re-definition of module `%s'.\n", nl->Owner()->Name());
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log_cmd_error("Re-definition of module `%s'.\n", netlist_name.c_str());
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return;
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}
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@ -1753,7 +1754,7 @@ struct VerificExtNets
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}
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};
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void verific_import(Design *design, std::string top)
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void verific_import(Design *design, const std::map<std::string,std::string> ¶meters, std::string top)
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{
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verific_sva_fsm_limit = 16;
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@ -1766,11 +1767,15 @@ void verific_import(Design *design, std::string top)
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if (vhdl_lib) vhdl_libs.InsertLast(vhdl_lib);
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if (veri_lib) veri_libs.InsertLast(veri_lib);
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Map verific_params(STRING_HASH);
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for (auto i : parameters)
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verific_params.Insert(i.first.c_str(), i.second.c_str());
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if (top.empty()) {
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netlists = hier_tree::ElaborateAll(&veri_libs, &vhdl_libs);
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netlists = hier_tree::ElaborateAll(&veri_libs, &vhdl_libs, &verific_params);
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}
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else {
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const Map *tree_tops = hier_tree::CreateHierarchicalTreeAll(&veri_libs, &vhdl_libs);
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const Map *tree_tops = hier_tree::CreateHierarchicalTreeAll(&veri_libs, &vhdl_libs, &verific_params);
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HierTreeNode *node = tree_tops ? static_cast<HierTreeNode*>(tree_tops->GetValue(top.c_str())) : NULL;
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if (node) {
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Map specific_tops(STRING_HASH);
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@ -1795,7 +1800,7 @@ void verific_import(Design *design, std::string top)
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int i;
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FOREACH_ARRAY_ITEM(netlists, i, nl) {
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if (top.empty() || nl->Owner()->Name() == top)
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if (top.empty() || nl->CellBaseName() == top)
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nl_todo.insert(nl);
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}
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@ -1812,7 +1817,7 @@ void verific_import(Design *design, std::string top)
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Netlist *nl = *nl_todo.begin();
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if (nl_done.count(nl) == 0) {
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VerificImporter importer(false, false, false, false, false, false);
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importer.import_netlist(design, nl, nl_todo);
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importer.import_netlist(design, nl, nl_todo, nl->CellBaseName() == top);
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}
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nl_todo.erase(nl);
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nl_done.insert(nl);
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@ -2235,8 +2240,8 @@ struct VerificPass : public Pass {
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continue;
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}
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if (args[argidx] == "-chparam" && argidx+2 < GetSize(args)) {
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const std::string &key = args[++argidx];
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const std::string &value = args[++argidx];
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const std::string &key = args[++argidx];
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const std::string &value = args[++argidx];
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unsigned new_insertion = parameters.Insert(key.c_str(), value.c_str(),
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1 /* force_overwrite */);
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if (!new_insertion)
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@ -26,7 +26,7 @@ YOSYS_NAMESPACE_BEGIN
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extern int verific_verbose;
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extern bool verific_import_pending;
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extern void verific_import(Design *design, std::string top = std::string());
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extern void verific_import(Design *design, const std::map<std::string,std::string> ¶meters, std::string top = std::string());
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extern pool<int> verific_sva_prims;
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@ -93,7 +93,7 @@ struct VerificImporter
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void merge_past_ffs_clock(pool<RTLIL::Cell*> &candidates, SigBit clock, bool clock_pol);
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void merge_past_ffs(pool<RTLIL::Cell*> &candidates);
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void import_netlist(RTLIL::Design *design, Verific::Netlist *nl, std::set<Verific::Netlist*> &nl_todo);
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void import_netlist(RTLIL::Design *design, Verific::Netlist *nl, std::set<Verific::Netlist*> &nl_todo, bool top=false);
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};
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void verific_import_sva_assert(VerificImporter *importer, Verific::Instance *inst);
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