Fix ecp5 tests

- remove *_synth.v files and generation in scripts;
- change synth_ice40 to synth_ecp5;

tests/ecp5/shifter.ys

@@ -2,8 +2,9 @@ read_verilog shifter.v
 hierarchy -top top
 proc
 flatten
-equiv_opt -assert -map +/ice40/cells_sim.v synth_ice40 # equivalency check
+equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check
 design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
 cd top # Constrain all select calls below inside the top module
-select -assert-count 8 t:SB_DFF
-select -assert-none t:SB_DFF %% t:* %D
+stat
+select -assert-count 8 t:TRELLIS_FF
+select -assert-none t:TRELLIS_FF %% t:* %D