diff --git a/passes/silimate/annotate_cell_fanout.cc b/passes/silimate/annotate_cell_fanout.cc index b205c9043..90bdcc4ca 100644 --- a/passes/silimate/annotate_cell_fanout.cc +++ b/passes/silimate/annotate_cell_fanout.cc @@ -389,6 +389,7 @@ void calculateFanout(RTLIL::Module *module, SigMap &sigmap, dict\n"); + log(" Limits the fanout by inserting balanced buffer trees.\n"); + log(" -formal\n"); + log(" For formal verification to pass, will prevent splitnets passes on ports, even if they have large fanout.\n"); + log(" -debug\n"); + log(" Debug trace.\n"); + log("\n"); + } void execute(std::vector args, RTLIL::Design *design) override { int limit = -1;