mirror of
https://github.com/YosysHQ/yosys
synced 2025-08-11 13:40:53 +00:00
ecp5: Use memory_libmap
pass.
This commit is contained in:
parent
7c5dba8b77
commit
a04b025abf
10 changed files with 593 additions and 592 deletions
|
@ -1,114 +1,52 @@
|
|||
bram $__ECP5_PDPW16KD
|
||||
init 1
|
||||
ram block $__ECP5_DP16KD_ {
|
||||
abits 14;
|
||||
widths 1 2 4 9 18 per_port;
|
||||
byte 9;
|
||||
cost 128;
|
||||
init no_undef;
|
||||
port srsw "A" "B" {
|
||||
clock anyedge;
|
||||
clken;
|
||||
wrbe_separate;
|
||||
portoption "WRITEMODE" "NORMAL" {
|
||||
rdwr no_change;
|
||||
}
|
||||
portoption "WRITEMODE" "WRITETHROUGH" {
|
||||
rdwr new;
|
||||
}
|
||||
portoption "WRITEMODE" "READBEFOREWRITE" {
|
||||
rdwr old;
|
||||
}
|
||||
option "RESETMODE" "SYNC" {
|
||||
rdsrst zero ungated block_wr;
|
||||
}
|
||||
option "RESETMODE" "ASYNC" {
|
||||
rdarst zero;
|
||||
}
|
||||
rdinit zero;
|
||||
}
|
||||
}
|
||||
|
||||
abits 9
|
||||
dbits 36
|
||||
|
||||
groups 2
|
||||
ports 1 1
|
||||
wrmode 1 0
|
||||
enable 4 1
|
||||
transp 0 0
|
||||
clocks 2 3
|
||||
clkpol 2 3
|
||||
endbram
|
||||
|
||||
bram $__ECP5_DP16KD
|
||||
init 1
|
||||
|
||||
abits 10 @a10d18
|
||||
dbits 18 @a10d18
|
||||
abits 11 @a11d9
|
||||
dbits 9 @a11d9
|
||||
abits 12 @a12d4
|
||||
dbits 4 @a12d4
|
||||
abits 13 @a13d2
|
||||
dbits 2 @a13d2
|
||||
abits 14 @a14d1
|
||||
dbits 1 @a14d1
|
||||
|
||||
groups 2
|
||||
ports 1 1
|
||||
wrmode 1 0
|
||||
enable 2 1 @a10d18
|
||||
enable 1 1 @a11d9 @a12d4 @a13d2 @a14d1
|
||||
transp 0 2
|
||||
clocks 2 3
|
||||
clkpol 2 3
|
||||
endbram
|
||||
|
||||
# The syn_* attributes are described in:
|
||||
# https://www.latticesemi.com/view_document?document_id=51556
|
||||
attr_icase 1
|
||||
|
||||
match $__ECP5_PDPW16KD
|
||||
# implicitly requested RAM or ROM
|
||||
attribute !syn_ramstyle syn_ramstyle=auto
|
||||
attribute !syn_romstyle syn_romstyle=auto
|
||||
attribute !ram_block
|
||||
attribute !rom_block
|
||||
attribute !logic_block
|
||||
min bits 2048
|
||||
min efficiency 5
|
||||
shuffle_enable A
|
||||
make_transp
|
||||
or_next_if_better
|
||||
endmatch
|
||||
|
||||
match $__ECP5_PDPW16KD
|
||||
# explicitly requested RAM
|
||||
attribute syn_ramstyle=block_ram ram_block
|
||||
attribute !syn_romstyle
|
||||
attribute !rom_block
|
||||
attribute !logic_block
|
||||
min wports 1
|
||||
shuffle_enable A
|
||||
make_transp
|
||||
or_next_if_better
|
||||
endmatch
|
||||
|
||||
match $__ECP5_PDPW16KD
|
||||
# explicitly requested ROM
|
||||
attribute syn_romstyle=ebr rom_block
|
||||
attribute !syn_ramstyle
|
||||
attribute !ram_block
|
||||
attribute !logic_block
|
||||
max wports 0
|
||||
shuffle_enable A
|
||||
make_transp
|
||||
or_next_if_better
|
||||
endmatch
|
||||
|
||||
match $__ECP5_DP16KD
|
||||
# implicitly requested RAM or ROM
|
||||
attribute !syn_ramstyle syn_ramstyle=auto
|
||||
attribute !syn_romstyle syn_romstyle=auto
|
||||
attribute !ram_block
|
||||
attribute !rom_block
|
||||
attribute !logic_block
|
||||
min bits 2048
|
||||
min efficiency 5
|
||||
shuffle_enable A
|
||||
or_next_if_better
|
||||
endmatch
|
||||
|
||||
match $__ECP5_DP16KD
|
||||
# explicitly requested RAM
|
||||
attribute syn_ramstyle=block_ram ram_block
|
||||
attribute !syn_romstyle
|
||||
attribute !rom_block
|
||||
attribute !logic_block
|
||||
min wports 1
|
||||
shuffle_enable A
|
||||
or_next_if_better
|
||||
endmatch
|
||||
|
||||
match $__ECP5_DP16KD
|
||||
# explicitly requested ROM
|
||||
attribute syn_romstyle=ebr rom_block
|
||||
attribute !syn_ramstyle
|
||||
attribute !ram_block
|
||||
attribute !logic_block
|
||||
max wports 0
|
||||
shuffle_enable A
|
||||
endmatch
|
||||
ram block $__ECP5_PDPW16KD_ {
|
||||
abits 14;
|
||||
widths 1 2 4 9 18 36 per_port;
|
||||
byte 9;
|
||||
cost 128;
|
||||
init no_undef;
|
||||
port sr "R" {
|
||||
clock anyedge;
|
||||
clken;
|
||||
option "RESETMODE" "SYNC" {
|
||||
rdsrst zero ungated;
|
||||
}
|
||||
option "RESETMODE" "ASYNC" {
|
||||
rdarst zero;
|
||||
}
|
||||
rdinit zero;
|
||||
}
|
||||
port sw "W" {
|
||||
width 36;
|
||||
clock anyedge;
|
||||
clken;
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue